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Commit dac9a771 authored by Paul Walmsley's avatar Paul Walmsley
Browse files

OMAP4: PRCM: move global reset function for OMAP4 to an OMAP4-specific file 



Move the OMAP4 global software reset function to the OMAP4-specific
prm44xx.c file, where it belongs.  Part of the long-term process of
moving all of the direct PRCM register writes into lower-layer code.

Also add OCP barriers on OMAP2/3/4 to reduce the chance that the MPU
will continue executing while the system is supposed to be resetting
itself.

Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
Tested-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: default avatarRajendra Nayak <rnayak@ti.com>
parent 2ace831f

arch/arm/mach-omap2/prcm.c

+8 −9
Original line number Original line Diff line number Diff line
@@ -68,17 +68,16 @@ void omap_prcm_arch_reset(char mode, const char *cmd) 
	} else if (cpu_is_omap34xx()) {

	} else if (cpu_is_omap34xx()) {

		prcm_offs = OMAP3430_GR_MOD;

		prcm_offs = OMAP3430_GR_MOD;

		omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0));

		omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0));

	} else if (cpu_is_omap44xx())

	} else if (cpu_is_omap44xx()) {

		prcm_offs = OMAP4430_PRM_DEVICE_INST;

		omap4_prm_global_warm_sw_reset(); /* never returns */

	else

	} else {

		WARN_ON(1);

		WARN_ON(1);

	}





	if (cpu_is_omap24xx() || cpu_is_omap34xx())

	/* XXX should be moved to some OMAP2/3 specific code */

	prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, prcm_offs,

	prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, prcm_offs,

			     OMAP2_RM_RSTCTRL);

			     OMAP2_RM_RSTCTRL);

	if (cpu_is_omap44xx())

	prm_read_mod_reg(prcm_offs, OMAP2_RM_RSTCTRL); /* OCP barrier */

		prm_set_mod_reg_bits(OMAP4430_RST_GLOBAL_WARM_SW_MASK,

				     prcm_offs, OMAP4_RM_RSTCTRL);

}

}





/**

/**

arch/arm/mach-omap2/prm44xx.c

+14 −0
Original line number Original line Diff line number Diff line
@@ -179,3 +179,17 @@ int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift) 
	return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0;

	return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0;

}

}





void omap4_prm_global_warm_sw_reset(void)

{

	u32 v;



	v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,

				    OMAP4_RM_RSTCTRL);

	v |= OMAP4430_RST_GLOBAL_WARM_SW_MASK;

	omap4_prm_write_inst_reg(v, OMAP4430_PRM_DEVICE_INST,

				 OMAP4_RM_RSTCTRL);



	/* OCP barrier */

	v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,

				    OMAP4_RM_RSTCTRL);

}

arch/arm/mach-omap2/prm44xx.h

+2 −0
Original line number Original line Diff line number Diff line
@@ -756,6 +756,8 @@ extern int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg, u8 shift); 
extern int omap4_prm_assert_hardreset(void __iomem *rstctrl_reg, u8 shift);

extern int omap4_prm_assert_hardreset(void __iomem *rstctrl_reg, u8 shift);

extern int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift);

extern int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift);





extern void omap4_prm_global_warm_sw_reset(void);



# endif

# endif





#endif
 
#endif