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Commit c97951ec authored by Kashyap, Desai's avatar Kashyap, Desai Committed by James Bottomley
Browse files

[SCSI] mpt2sas: Fixed Big Indian Issues on 32 bit PPC 



This patch addresses many endian issues solved by runing sparse with the
option __CHECK_ENDIAN__ turned on.

Signed-off-by: default avatarKashyap Desai <kashyap.desai@lsi.com>
Signed-off-by: default avatarJames Bottomley <JBottomley@Parallels.com>
parent d7e01dc6

drivers/scsi/mpt2sas/mpt2sas_base.c

+25 −40
Original line number Diff line number Diff line
@@ -94,7 +94,7 @@ module_param(diag_buffer_enable, int, 0); 
MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers "

    "(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)");



int mpt2sas_fwfault_debug;

static int mpt2sas_fwfault_debug;

MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "

    "and halt firmware - (default=0)");
@@ -857,7 +857,7 @@ _base_interrupt(int irq, void *bus_id) 
	completed_cmds = 0;

	cb_idx = 0xFF;

	do {

		rd.word = rpf->Words;

		rd.word = le64_to_cpu(rpf->Words);

		if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)

			goto out;

		reply = 0;
@@ -906,7 +906,7 @@ _base_interrupt(int irq, void *bus_id) 


 next:



		rpf->Words = ULLONG_MAX;

		rpf->Words = cpu_to_le64(ULLONG_MAX);

		ioc->reply_post_host_index = (ioc->reply_post_host_index ==

		    (ioc->reply_post_queue_depth - 1)) ? 0 :

		    ioc->reply_post_host_index + 1;
@@ -1817,7 +1817,9 @@ _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc) 
	char desc[16];

	u8 revision;

	u32 iounit_pg1_flags;

	u32 bios_version;



	bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);

	pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);

	strncpy(desc, ioc->manu_pg0.ChipName, 16);

	printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
@@ -1828,10 +1830,10 @@ _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc) 
	   (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,

	   ioc->facts.FWVersion.Word & 0x000000FF,

	   revision,

	   (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24,

	   (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16,

	   (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8,

	    ioc->bios_pg3.BiosVersion & 0x000000FF);

	   (bios_version & 0xFF000000) >> 24,

	   (bios_version & 0x00FF0000) >> 16,

	   (bios_version & 0x0000FF00) >> 8,

	    bios_version & 0x000000FF);



	_base_display_dell_branding(ioc);

	_base_display_intel_branding(ioc);
@@ -2150,7 +2152,7 @@ _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc) 
static int

_base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc,  int sleep_flag)

{

	Mpi2IOCFactsReply_t *facts;

	struct mpt2sas_facts *facts;

	u32 queue_size, queue_diff;

	u16 max_sge_elements;

	u16 num_of_reply_frames;
@@ -2783,7 +2785,7 @@ _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes, 
	int i;

	u8 failed;

	u16 dummy;

	u32 *mfp;

	__le32 *mfp;



	/* make sure doorbell is not in use */

	if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
@@ -2871,7 +2873,7 @@ _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes, 
	writel(0, &ioc->chip->HostInterruptStatus);



	if (ioc->logging_level & MPT_DEBUG_INIT) {

		mfp = (u32 *)reply;

		mfp = (__le32 *)reply;

		printk(KERN_INFO "\toffset:data\n");

		for (i = 0; i < reply_bytes/4; i++)

			printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
@@ -3097,7 +3099,8 @@ static int 
_base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)

{

	Mpi2PortFactsRequest_t mpi_request;

	Mpi2PortFactsReply_t mpi_reply, *pfacts;

	Mpi2PortFactsReply_t mpi_reply;

	struct mpt2sas_port_facts *pfacts;

	int mpi_reply_sz, mpi_request_sz, r;



	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
@@ -3139,7 +3142,8 @@ static int 
_base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)

{

	Mpi2IOCFactsRequest_t mpi_request;

	Mpi2IOCFactsReply_t mpi_reply, *facts;

	Mpi2IOCFactsReply_t mpi_reply;

	struct mpt2sas_facts *facts;

	int mpi_reply_sz, mpi_request_sz, r;



	dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
@@ -3225,17 +3229,6 @@ _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 
	mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);

	mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);



	/* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was

	 * removed and made reserved.  For those with older firmware will need

	 * this fix. It was decided that the Reply and Request frame sizes are

	 * the same.

	 */

	if ((ioc->facts.HeaderVersion >> 8) < 0xA) {

		mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz);

/*		mpi_request.SystemReplyFrameSize =

 *		 cpu_to_le16(ioc->reply_sz);

 */

	}



	mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);

	mpi_request.ReplyDescriptorPostQueueDepth =
@@ -3243,25 +3236,17 @@ _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 
	mpi_request.ReplyFreeQueueDepth =

	    cpu_to_le16(ioc->reply_free_queue_depth);



#if BITS_PER_LONG > 32

	mpi_request.SenseBufferAddressHigh =

	    cpu_to_le32(ioc->sense_dma >> 32);

	    cpu_to_le32((u64)ioc->sense_dma >> 32);

	mpi_request.SystemReplyAddressHigh =

	    cpu_to_le32(ioc->reply_dma >> 32);

	    cpu_to_le32((u64)ioc->reply_dma >> 32);

	mpi_request.SystemRequestFrameBaseAddress =

	    cpu_to_le64(ioc->request_dma);

	    cpu_to_le64((u64)ioc->request_dma);

	mpi_request.ReplyFreeQueueAddress =

	    cpu_to_le64(ioc->reply_free_dma);

	    cpu_to_le64((u64)ioc->reply_free_dma);

	mpi_request.ReplyDescriptorPostQueueAddress =

	    cpu_to_le64(ioc->reply_post_free_dma);

#else

	mpi_request.SystemRequestFrameBaseAddress =

	    cpu_to_le32(ioc->request_dma);

	mpi_request.ReplyFreeQueueAddress =

	    cpu_to_le32(ioc->reply_free_dma);

	mpi_request.ReplyDescriptorPostQueueAddress =

	    cpu_to_le32(ioc->reply_post_free_dma);

#endif

	    cpu_to_le64((u64)ioc->reply_post_free_dma);





	/* This time stamp specifies number of milliseconds

	 * since epoch ~ midnight January 1, 1970.
@@ -3271,10 +3256,10 @@ _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 
	    (current_time.tv_usec / 1000));



	if (ioc->logging_level & MPT_DEBUG_INIT) {

		u32 *mfp;

		__le32 *mfp;

		int i;



		mfp = (u32 *)&mpi_request;

		mfp = (__le32 *)&mpi_request;

		printk(KERN_INFO "\toffset:data\n");

		for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)

			printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
@@ -3759,7 +3744,7 @@ _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 


	/* initialize Reply Post Free Queue */

	for (i = 0; i < ioc->reply_post_queue_depth; i++)

		ioc->reply_post_free[i].Words = ULLONG_MAX;

		ioc->reply_post_free[i].Words = cpu_to_le64(ULLONG_MAX);



	r = _base_send_ioc_init(ioc, sleep_flag);

	if (r)

drivers/scsi/mpt2sas/mpt2sas_base.h

+50 −3
Original line number Diff line number Diff line
@@ -541,6 +541,53 @@ struct _tr_list { 


typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr);



/* IOC Facts and Port Facts converted from little endian to cpu */

union mpi2_version_union {

	MPI2_VERSION_STRUCT		Struct;

	u32				Word;

};



struct mpt2sas_facts {

	u16			MsgVersion;

	u16			HeaderVersion;

	u8			IOCNumber;

	u8			VP_ID;

	u8			VF_ID;

	u16			IOCExceptions;

	u16			IOCStatus;

	u32			IOCLogInfo;

	u8			MaxChainDepth;

	u8			WhoInit;

	u8			NumberOfPorts;

	u8			MaxMSIxVectors;

	u16			RequestCredit;

	u16			ProductID;

	u32			IOCCapabilities;

	union mpi2_version_union	FWVersion;

	u16			IOCRequestFrameSize;

	u16			Reserved3;

	u16			MaxInitiators;

	u16			MaxTargets;

	u16			MaxSasExpanders;

	u16			MaxEnclosures;

	u16			ProtocolFlags;

	u16			HighPriorityCredit;

	u16			MaxReplyDescriptorPostQueueDepth;

	u8			ReplyFrameSize;

	u8			MaxVolumes;

	u16			MaxDevHandle;

	u16			MaxPersistentEntries;

	u16			MinDevHandle;

};



struct mpt2sas_port_facts {

	u8			PortNumber;

	u8			VP_ID;

	u8			VF_ID;

	u8			PortType;

	u16			MaxPostedCmdBuffers;

};



/**

 * struct MPT2SAS_ADAPTER - per adapter struct

 * @list: ioc_list
@@ -749,8 +796,8 @@ struct MPT2SAS_ADAPTER { 
	u32		event_masks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];



	/* static config pages */

	Mpi2IOCFactsReply_t facts;

	Mpi2PortFactsReply_t *pfacts;

	struct mpt2sas_facts facts;

	struct mpt2sas_port_facts *pfacts;

	Mpi2ManufacturingPage0_t manu_pg0;

	Mpi2BiosPage2_t	bios_pg2;

	Mpi2BiosPage3_t	bios_pg3;
@@ -840,7 +887,7 @@ struct MPT2SAS_ADAPTER { 


	/* reply free queue */

	u16 		reply_free_queue_depth;

	u32		*reply_free;

	__le32		*reply_free;

	dma_addr_t	reply_free_dma;

	struct dma_pool *reply_free_dma_pool;

	u32		reply_free_host_index;

drivers/scsi/mpt2sas/mpt2sas_ctl.c

+5 −5
Original line number Diff line number Diff line
@@ -2706,13 +2706,13 @@ static DEVICE_ATTR(ioc_reset_count, S_IRUGO, 
    _ctl_ioc_reset_count_show, NULL);



struct DIAG_BUFFER_START {

	u32 Size;

	u32 DiagVersion;

	__le32 Size;

	__le32 DiagVersion;

	u8 BufferType;

	u8 Reserved[3];

	u32 Reserved1;

	u32 Reserved2;

	u32 Reserved3;

	__le32 Reserved1;

	__le32 Reserved2;

	__le32 Reserved3;

};

/**

 * _ctl_host_trace_buffer_size_show - host buffer size (trace only)

drivers/scsi/mpt2sas/mpt2sas_debug.h

+1 −1
Original line number Diff line number Diff line
@@ -164,7 +164,7 @@ static inline void 
_debug_dump_mf(void *mpi_request, int sz)

{

	int i;

	u32 *mfp = (u32 *)mpi_request;

	__le32 *mfp = (__le32 *)mpi_request;



	printk(KERN_INFO "mf:\n\t");

	for (i = 0; i < sz; i++) {

drivers/scsi/mpt2sas/mpt2sas_scsih.c

+6 −6
Original line number Diff line number Diff line
@@ -1956,7 +1956,7 @@ _scsih_slave_configure(struct scsi_device *sdev) 
		case MPI2_RAID_VOL_TYPE_RAID1E:

			qdepth = MPT2SAS_RAID_QUEUE_DEPTH;

			if (ioc->manu_pg10.OEMIdentifier &&

			    (ioc->manu_pg10.GenericFlags0 &

			    (le32_to_cpu(ioc->manu_pg10.GenericFlags0) &

			    MFG10_GF0_R10_DISPLAY) &&

			    !(raid_device->num_pds % 2))

				r_level = "RAID10";
@@ -4598,7 +4598,7 @@ _scsih_expander_add(struct MPT2SAS_ADAPTER *ioc, u16 handle) 
	Mpi2SasEnclosurePage0_t enclosure_pg0;

	u32 ioc_status;

	u16 parent_handle;

	__le64 sas_address, sas_address_parent = 0;

	u64 sas_address, sas_address_parent = 0;

	int i;

	unsigned long flags;

	struct _sas_port *mpt2sas_port = NULL;
@@ -5404,7 +5404,7 @@ _scsih_sas_device_status_change_event(struct MPT2SAS_ADAPTER *ioc, 
{

	struct MPT2SAS_TARGET *target_priv_data;

	struct _sas_device *sas_device;

	__le64 sas_address;

	u64 sas_address;

	unsigned long flags;

	Mpi2EventDataSasDeviceStatusChange_t *event_data =

	    fw_event->event_data;
@@ -6566,7 +6566,7 @@ _scsih_search_responding_expanders(struct MPT2SAS_ADAPTER *ioc) 
	Mpi2ExpanderPage0_t expander_pg0;

	Mpi2ConfigReply_t mpi_reply;

	u16 ioc_status;

	__le64 sas_address;

	u64 sas_address;

	u16 handle;



	printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, __func__);
@@ -7505,7 +7505,7 @@ _scsih_suspend(struct pci_dev *pdev, pm_message_t state) 
{

	struct Scsi_Host *shost = pci_get_drvdata(pdev);

	struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);

	u32 device_state;

	pci_power_t device_state;



	mpt2sas_base_stop_watchdog(ioc);

	scsi_block_requests(shost);
@@ -7532,7 +7532,7 @@ _scsih_resume(struct pci_dev *pdev) 
{

	struct Scsi_Host *shost = pci_get_drvdata(pdev);

	struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);

	u32 device_state = pdev->current_state;

	pci_power_t device_state = pdev->current_state;

	int r;



	printk(MPT2SAS_INFO_FMT "pdev=0x%p, slot=%s, previous "