Loading arch/arm/mach-msm/restart.c +4 −0 Original line number Diff line number Diff line Loading @@ -111,6 +111,10 @@ static void enable_emergency_dload_mode(void) __raw_writel(EMERGENCY_DLOAD_MAGIC3, emergency_dload_mode_addr + (2 * sizeof(unsigned int))); /* Need disable the pmic wdt, then the emergency dload mode * will not auto reset. */ qpnp_pon_wd_config(0); mb(); } } Loading drivers/platform/msm/qpnp-power-on.c +29 −0 Original line number Diff line number Diff line Loading @@ -51,6 +51,8 @@ #define QPNP_PON_KPDPWR_RESIN_S2_CNTL2(base) (base + 0x4B) #define QPNP_PON_PS_HOLD_RST_CTL(base) (base + 0x5A) #define QPNP_PON_PS_HOLD_RST_CTL2(base) (base + 0x5B) #define QPNP_PON_WD_RST_S2_CTL(base) (base + 0x56) #define QPNP_PON_WD_RST_S2_CTL2(base) (base + 0x57) #define QPNP_PON_TRIGGER_EN(base) (base + 0x80) #define QPNP_PON_S3_DBC_CTL(base) (base + 0x75) Loading @@ -74,6 +76,7 @@ #define QPNP_PON_RESIN_BARK_N_SET BIT(4) #define QPNP_PON_KPDPWR_RESIN_BARK_N_SET BIT(5) #define QPNP_PON_WD_EN BIT(7) #define QPNP_PON_RESET_EN BIT(7) #define QPNP_PON_POWER_OFF_MASK 0xF Loading Loading @@ -357,6 +360,32 @@ int qpnp_pon_is_warm_reset(void) } EXPORT_SYMBOL(qpnp_pon_is_warm_reset); /** * qpnp_pon_wd_config - Disable the wd in a warm reset. * @enable: to enable or disable the PON watch dog * * Returns = 0 for operate successfully, < 0 for errors */ int qpnp_pon_wd_config(bool enable) { struct qpnp_pon *pon = sys_reset_dev; int rc = 0; if (!pon) return -EPROBE_DEFER; rc = qpnp_pon_masked_write(pon, QPNP_PON_WD_RST_S2_CTL2(pon->base), QPNP_PON_WD_EN, enable ? QPNP_PON_WD_EN : 0); if (rc) dev_err(&pon->spmi->dev, "Unable to write to addr=%x, rc(%d)\n", QPNP_PON_WD_RST_S2_CTL2(pon->base), rc); return rc; } EXPORT_SYMBOL(qpnp_pon_wd_config); /** * qpnp_pon_trigger_config - Configures (enable/disable) the PON trigger source * @pon_src: PON source to be configured Loading include/linux/qpnp/power-on.h +5 −0 Original line number Diff line number Diff line Loading @@ -52,6 +52,7 @@ enum pon_power_off_type { int qpnp_pon_system_pwr_off(enum pon_power_off_type type); int qpnp_pon_is_warm_reset(void); int qpnp_pon_trigger_config(enum pon_trigger_source pon_src, bool enable); int qpnp_pon_wd_config(bool enable); #else static int qpnp_pon_system_pwr_off(enum pon_power_off_type type) { Loading @@ -63,6 +64,10 @@ static inline int qpnp_pon_trigger_config(enum pon_trigger_source pon_src, { return -ENODEV; } int qpnp_pon_wd_config(bool enable) { return -ENODEV; } #endif #endif Loading
arch/arm/mach-msm/restart.c +4 −0 Original line number Diff line number Diff line Loading @@ -111,6 +111,10 @@ static void enable_emergency_dload_mode(void) __raw_writel(EMERGENCY_DLOAD_MAGIC3, emergency_dload_mode_addr + (2 * sizeof(unsigned int))); /* Need disable the pmic wdt, then the emergency dload mode * will not auto reset. */ qpnp_pon_wd_config(0); mb(); } } Loading
drivers/platform/msm/qpnp-power-on.c +29 −0 Original line number Diff line number Diff line Loading @@ -51,6 +51,8 @@ #define QPNP_PON_KPDPWR_RESIN_S2_CNTL2(base) (base + 0x4B) #define QPNP_PON_PS_HOLD_RST_CTL(base) (base + 0x5A) #define QPNP_PON_PS_HOLD_RST_CTL2(base) (base + 0x5B) #define QPNP_PON_WD_RST_S2_CTL(base) (base + 0x56) #define QPNP_PON_WD_RST_S2_CTL2(base) (base + 0x57) #define QPNP_PON_TRIGGER_EN(base) (base + 0x80) #define QPNP_PON_S3_DBC_CTL(base) (base + 0x75) Loading @@ -74,6 +76,7 @@ #define QPNP_PON_RESIN_BARK_N_SET BIT(4) #define QPNP_PON_KPDPWR_RESIN_BARK_N_SET BIT(5) #define QPNP_PON_WD_EN BIT(7) #define QPNP_PON_RESET_EN BIT(7) #define QPNP_PON_POWER_OFF_MASK 0xF Loading Loading @@ -357,6 +360,32 @@ int qpnp_pon_is_warm_reset(void) } EXPORT_SYMBOL(qpnp_pon_is_warm_reset); /** * qpnp_pon_wd_config - Disable the wd in a warm reset. * @enable: to enable or disable the PON watch dog * * Returns = 0 for operate successfully, < 0 for errors */ int qpnp_pon_wd_config(bool enable) { struct qpnp_pon *pon = sys_reset_dev; int rc = 0; if (!pon) return -EPROBE_DEFER; rc = qpnp_pon_masked_write(pon, QPNP_PON_WD_RST_S2_CTL2(pon->base), QPNP_PON_WD_EN, enable ? QPNP_PON_WD_EN : 0); if (rc) dev_err(&pon->spmi->dev, "Unable to write to addr=%x, rc(%d)\n", QPNP_PON_WD_RST_S2_CTL2(pon->base), rc); return rc; } EXPORT_SYMBOL(qpnp_pon_wd_config); /** * qpnp_pon_trigger_config - Configures (enable/disable) the PON trigger source * @pon_src: PON source to be configured Loading
include/linux/qpnp/power-on.h +5 −0 Original line number Diff line number Diff line Loading @@ -52,6 +52,7 @@ enum pon_power_off_type { int qpnp_pon_system_pwr_off(enum pon_power_off_type type); int qpnp_pon_is_warm_reset(void); int qpnp_pon_trigger_config(enum pon_trigger_source pon_src, bool enable); int qpnp_pon_wd_config(bool enable); #else static int qpnp_pon_system_pwr_off(enum pon_power_off_type type) { Loading @@ -63,6 +64,10 @@ static inline int qpnp_pon_trigger_config(enum pon_trigger_source pon_src, { return -ENODEV; } int qpnp_pon_wd_config(bool enable) { return -ENODEV; } #endif #endif