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Commit a484701d authored by Aparna Das's avatar Aparna Das
Browse files

ARM: dts: msm: add coresight dt nodes for remote processors for 9625 



Add CoreSight device tree nodes for remote processors required for
supporting ETM trace on these processors.

Change-Id: I64f925ad1034fdf3baed1b0aad02489dfaed6118
Signed-off-by: default avatarAparna Das <adas@codeaurora.org>
parent 8d4729c1

arch/arm/boot/dts/msm9625-coresight.dtsi

+46 −13
Original line number Diff line number Diff line
@@ -135,12 +135,45 @@ 
		qcom,round-robin;

	};



	audio_etm0 {

		compatible = "qcom,coresight-audio-etm";



		coresight-id = <9>;

		coresight-name = "coresight-audio-etm0";

		coresight-nr-inports = <0>;

		coresight-outports = <0>;

		coresight-child-list = <&funnel_in0>;

		coresight-child-ports = <2>;

	};



	modem_etm0 {

		compatible = "qcom,coresight-modem-etm";



		coresight-id = <10>;

		coresight-name = "coresight-modem-etm0";

		coresight-nr-inports = <0>;

		coresight-outports = <0>;

		coresight-child-list = <&funnel_in0>;

		coresight-child-ports = <1>;

	};



	rpm_etm0 {

		compatible = "qcom,coresight-rpm-etm";



		coresight-id = <11>;

		coresight-name = "coresight-rpm-etm0";

		coresight-nr-inports = <0>;

		coresight-outports = <0>;

		coresight-child-list = <&funnel_in0>;

		coresight-child-ports = <0>;

	};



	csr: csr@fc302000 {

		compatible = "qcom,coresight-csr";

		reg = <0xfc302000 0x1000>;

		reg-names = "csr-base";



		coresight-id = <9>;

		coresight-id = <12>;

		coresight-name = "coresight-csr";

		coresight-nr-inports = <0>;
@@ -152,7 +185,7 @@ 
		reg = <0xfc308000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <10>;

		coresight-id = <13>;

		coresight-name = "coresight-cti0";

		coresight-nr-inports = <0>;

	};
@@ -162,7 +195,7 @@ 
		reg = <0xfc309000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <11>;

		coresight-id = <14>;

		coresight-name = "coresight-cti1";

		coresight-nr-inports = <0>;

	};
@@ -172,7 +205,7 @@ 
		reg = <0xfc30a000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <12>;

		coresight-id = <15>;

		coresight-name = "coresight-cti2";

		coresight-nr-inports = <0>;

	};
@@ -182,7 +215,7 @@ 
		reg = <0xfc30b000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <13>;

		coresight-id = <16>;

		coresight-name = "coresight-cti3";

		coresight-nr-inports = <0>;

	};
@@ -192,7 +225,7 @@ 
		reg = <0xfc30c000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <14>;

		coresight-id = <17>;

		coresight-name = "coresight-cti4";

		coresight-nr-inports = <0>;

	};
@@ -202,7 +235,7 @@ 
		reg = <0xfc30d000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <15>;

		coresight-id = <18>;

		coresight-name = "coresight-cti5";

		coresight-nr-inports = <0>;

	};
@@ -212,7 +245,7 @@ 
		reg = <0xfc30e000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <16>;

		coresight-id = <19>;

		coresight-name = "coresight-cti6";

		coresight-nr-inports = <0>;

	};
@@ -222,7 +255,7 @@ 
		reg = <0xfc30f000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <17>;

		coresight-id = <20>;

		coresight-name = "coresight-cti7";

		coresight-nr-inports = <0>;

	};
@@ -232,7 +265,7 @@ 
		reg = <0xfc310000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <18>;

		coresight-id = <21>;

		coresight-name = "coresight-cti8";

		coresight-nr-inports = <0>;

	};
@@ -242,7 +275,7 @@ 
		reg = <0xfc333000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <19>;

		coresight-id = <22>;

		coresight-name = "coresight-cti-cpu";

		coresight-nr-inports = <0>;

	};
@@ -254,7 +287,7 @@ 
		      <0xfc401600 0x80>;

		reg-names = "apcs-mux", "ppss-mux", "gcc-mux";



		coresight-id = <20>;

		coresight-id = <23>;

		coresight-name = "coresight-hwevent";

		coresight-nr-inports = <0>;

	};
@@ -264,7 +297,7 @@ 
		reg = <0xfc4be024 0x8>;

		reg-names = "fuse-base";



		coresight-id = <21>;

		coresight-id = <24>;

		coresight-name = "coresight-fuse";

		coresight-nr-inports = <0>;

	};