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Commit 9c8cbd4e authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "qcom: clk: clock-a7: Introduce device tree lookup for cpu clock"

parents 74145d9d 1a4fc703
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+11 −3
Original line number Diff line number Diff line
/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
@@ -12,6 +12,7 @@

/memreserve/ 0x00000000 0x00001000;
#include "skeleton.dtsi"
#include <dt-bindings/clock/msm-clocks-a7.h>

/ {
	model = "Qualcomm Technologies, Inc. MDM 9630";
@@ -784,7 +785,7 @@
		vdd_dig_ao-supply = <&pmd9635_l3_corner_ao>;
	};

	qcom,clock-a7@f9010008 {
	clock_cpu: qcom,clock-a7@f9010008 {
		compatible = "qcom,clock-a7-9630";
		reg = <0xf9010008 0x8>;
		reg-names = "rcg-base";
@@ -797,6 +798,7 @@
			<1152000000 7>;

		cpu-vdd-supply = <&pmd9635_l3_corner_ao>;
		#clock-cells = <1>;
	};

	cpubw: qcom,cpubw {
@@ -820,9 +822,15 @@
		};
	};

	qcom,msm-cpufreq@0 {
	qcom,msm-cpufreq {
		reg = <0 4>;
		compatible = "qcom,msm-cpufreq";
		clocks = <&clock_cpu  clk_a7ssmux>,
			 <&clock_cpu  clk_a7ssmux>,
			 <&clock_cpu  clk_a7ssmux>,
			 <&clock_cpu  clk_a7ssmux>;
		clock-names = "cpu0_clk", "cpu1_clk",
				"cpu2_clk", "cpu3_clk";
		qcom,cpufreq-table =
			<  300000 >,
			<  600000 >,
+11 −3
Original line number Diff line number Diff line
/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
@@ -11,6 +11,7 @@
 */

#include "skeleton.dtsi"
#include <dt-bindings/clock/msm-clocks-a7.h>

/ {
	model = "Qualcomm Technologies, Inc. MSM 8226";
@@ -1016,7 +1017,7 @@
		vdd_sr2_dig-supply = <&pm8226_s1_corner_ao>;
	};

	qcom,clock-a7@f9011050 {
	clock_cpu: qcom,clock-a7@f9011050 {
		compatible = "qcom,clock-a7-8226";
		reg = <0xf9011050 0x8>;
		reg-names = "rcg-base";
@@ -1028,6 +1029,7 @@
			<1190400000 3>;

		cpu-vdd-supply = <&apc_vreg_corner>;
		#clock-cells = <1>;
	};

	cpubw: qcom,cpubw {
@@ -1057,9 +1059,15 @@
		};
	};

	qcom,msm-cpufreq@0 {
	qcom,msm-cpufreq {
		reg = <0 4>;
		compatible = "qcom,msm-cpufreq";
		clocks = <&clock_cpu  clk_a7ssmux>,
			 <&clock_cpu  clk_a7ssmux>,
			 <&clock_cpu  clk_a7ssmux>,
			 <&clock_cpu  clk_a7ssmux>;
		clock-names = "cpu0_clk", "cpu1_clk",
				"cpu2_clk", "cpu3_clk";
		qcom,cpufreq-table =
			<  300000 >,
			<  384000 >,
+10 −2
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@

#include "skeleton64.dtsi"
#include <dt-bindings/clock/msm-clocks-8909.h>
#include <dt-bindings/clock/msm-clocks-a7.h>

/ {
	model = "Qualcomm Technologies, Inc. MSM8909";
@@ -262,7 +263,7 @@
		#clock-cells = <1>;
	};

	qcom,clock-a7@0b011050 {
	clock_cpu: qcom,clock-a7@0b011050 {
		compatible = "qcom,clock-a53-8916";
		reg = <0x0b011050 0x8>,
		      <0x0005c00c 0x8>;
@@ -283,6 +284,7 @@
			<  400000000 4>,
			<  800000000 5>,
			< 1094400000 7>;
		#clock-cells = <1>;
	};

	cpubw: qcom,cpubw {
@@ -317,9 +319,15 @@
		qcom,target-dev = <&cpubw>;
	};

	qcom,msm-cpufreq@0 {
	qcom,msm-cpufreq {
		reg = <0 4>;
		compatible = "qcom,msm-cpufreq";
		clocks = <&clock_cpu  clk_a7ssmux>,
			 <&clock_cpu  clk_a7ssmux>,
			 <&clock_cpu  clk_a7ssmux>,
			 <&clock_cpu  clk_a7ssmux>;
		clock-names = "cpu0_clk", "cpu1_clk",
				"cpu2_clk", "cpu3_clk";
		qcom,cpufreq-table =
			 <  200000 >,
			 <  400000 >,
+10 −2
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@

#include "skeleton64.dtsi"
#include <dt-bindings/clock/msm-clocks-8916.h>
#include <dt-bindings/clock/msm-clocks-a7.h>

/ {
	model = "Qualcomm Technologies, Inc. MSM8916";
@@ -298,7 +299,7 @@
		qcom,sensor-id = <0 1 2 4 5>;
	};

	qcom,clock-a7@0b011050 {
	clock_cpu: qcom,clock-a7@0b011050 {
		compatible = "qcom,clock-a53-8916";
		reg = <0x0b011050 0x8>,
		      <0x0005c004 0x8>;
@@ -328,6 +329,7 @@
			<  998400000 5>,
			< 1094400000 6>,
			< 1152000000 7>;
		#clock-cells = <1>;
	};

	cpubw: qcom,cpubw {
@@ -360,9 +362,15 @@
		};
	};

	qcom,msm-cpufreq@0 {
	qcom,msm-cpufreq {
		reg = <0 4>;
		compatible = "qcom,msm-cpufreq";
		clocks = <&clock_cpu  clk_a7ssmux>,
			 <&clock_cpu  clk_a7ssmux>,
			 <&clock_cpu  clk_a7ssmux>,
			 <&clock_cpu  clk_a7ssmux>;
		clock-names = "cpu0_clk", "cpu1_clk",
				"cpu2_clk", "cpu3_clk";
		qcom,cpufreq-table =
			 <  200000 >,
			 <  400000 >,
+31 −2
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@

#include "skeleton.dtsi"
#include <dt-bindings/clock/msm-clocks-zirc.h>
#include <dt-bindings/clock/msm-clocks-a7.h>

/ {
	model = "Qualcomm Technologies, Inc. MSM ZIRC";
@@ -297,7 +298,7 @@
		compatible = "qcom,rmnet-ipa";
	};

	qcom,clock-a7@0b010008 {
	clock_cpu: qcom,clock-a7@0b010008 {
		compatible = "qcom,clock-a7-zirc";
		reg = <0x0B010008 0x8>;
		reg-names = "rcg-base";
@@ -313,11 +314,39 @@
			<1190400000 7>;

		cpu-vdd-supply = <&pmd9635_s5_corner_ao>;
		#clock-cells = <1>;
	};

        qcom,msm-cpufreq@0 {
	cpubw: qcom,cpubw {
		compatible = "qcom,devbw";
		governor = "cpufreq";
		qcom,src-dst-ports = <1 512>;
		qcom,active-only;
		qcom,bw-tbl =
			< 1541 /* 202 MHz */ >,
			< 3082 /* 404 MHz */ >,
			< 3952 /* 518 MHz */ >;
	};

	devfreq-cpufreq {
		cpubw-cpufreq {
			target-dev = <&cpubw>;
			cpu-to-dev-map =
				<  600000 1541 >,
				<  787200 3082 >,
				< 1190400 3952 >;
		};
	};

        qcom,msm-cpufreq {
                reg = <0 4>;
                compatible = "qcom,msm-cpufreq";
		clocks = <&clock_cpu  clk_a7ssmux>,
			 <&clock_cpu  clk_a7ssmux>,
			 <&clock_cpu  clk_a7ssmux>,
			 <&clock_cpu  clk_a7ssmux>;
		clock-names = "cpu0_clk", "cpu1_clk",
				"cpu2_clk", "cpu3_clk";
                qcom,cpufreq-table =
                        <  300000 >,
                        <  600000 >,
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