Loading arch/arm/include/asm/io.h +1 −1 Original line number Diff line number Diff line Loading @@ -27,7 +27,7 @@ #include <asm/byteorder.h> #include <asm/memory.h> #include <asm-generic/pci_iomap.h> #include <mach/msm_rtb.h> #include <linux/msm_rtb.h> /* * ISA I/O bus memory addresses are 1:1 with the physical address. Loading arch/arm/mach-msm/Kconfig +0 −17 Original line number Diff line number Diff line Loading @@ -1602,13 +1602,6 @@ config SENSORS_ADSP such as for lower-power OCMEM use cases, and for time syncing with ADSP clock. config MSM_RTB bool "Register tracing" help Add support for logging different events to a small uncached region. This is designed to aid in debugging reset cases where the caches may not be flushed before the target resets. config USE_PINCTRL_IRQ default n bool "Use Pinctrl IRQ chip" Loading @@ -1618,16 +1611,6 @@ config USE_PINCTRL_IRQ attributes to be configured, prior to configuring them as interrupt triggers. config MSM_RTB_SEPARATE_CPUS bool "Separate entries for each cpu" depends on MSM_RTB depends on SMP help Under some circumstances, it may be beneficial to give dedicated space for each cpu to log accesses. Selecting this option will log each cpu separately. This will guarantee that the last acesses for each cpu will be logged but there will be fewer entries per cpu config MSM_EBI_ERP bool "External Bus Interface (EBI) error reporting" help Loading arch/arm/mach-msm/Makefile +0 −1 Original line number Diff line number Diff line Loading @@ -195,7 +195,6 @@ obj-$(CONFIG_MSM_RPC_VIBRATOR) += msm_vibrator.o obj-$(CONFIG_MSM_NATIVE_RESTART) += restart.o obj-$(CONFIG_EXTERNAL_MDM) += mdm2.o mdm_common.o obj-$(CONFIG_MSM_RTB) += msm_rtb.o obj-$(CONFIG_MSM_CACHE_ERP) += cache_erp.o obj-$(CONFIG_MSM_EBI_ERP) += ebi_erp.o obj-$(CONFIG_MSM_CACHE_DUMP) += msm_cache_dump.o Loading arch/arm/mach-msm/hotplug.c +1 −1 Original line number Diff line number Diff line Loading @@ -12,12 +12,12 @@ #include <linux/smp.h> #include <linux/cpu.h> #include <linux/notifier.h> #include <linux/msm_rtb.h> #include <asm/smp_plat.h> #include <asm/vfp.h> #include <mach/jtag.h> #include <mach/msm_rtb.h> #include "pm.h" #include "spm.h" Loading arch/arm/mm/context.c +1 −2 Original line number Diff line number Diff line Loading @@ -15,14 +15,13 @@ #include <linux/mm.h> #include <linux/smp.h> #include <linux/percpu.h> #include <linux/msm_rtb.h> #include <asm/mmu_context.h> #include <asm/smp_plat.h> #include <asm/thread_notify.h> #include <asm/tlbflush.h> #include <mach/msm_rtb.h> /* * On ARMv6, we have the following structure in the Context ID: * Loading Loading
arch/arm/include/asm/io.h +1 −1 Original line number Diff line number Diff line Loading @@ -27,7 +27,7 @@ #include <asm/byteorder.h> #include <asm/memory.h> #include <asm-generic/pci_iomap.h> #include <mach/msm_rtb.h> #include <linux/msm_rtb.h> /* * ISA I/O bus memory addresses are 1:1 with the physical address. Loading
arch/arm/mach-msm/Kconfig +0 −17 Original line number Diff line number Diff line Loading @@ -1602,13 +1602,6 @@ config SENSORS_ADSP such as for lower-power OCMEM use cases, and for time syncing with ADSP clock. config MSM_RTB bool "Register tracing" help Add support for logging different events to a small uncached region. This is designed to aid in debugging reset cases where the caches may not be flushed before the target resets. config USE_PINCTRL_IRQ default n bool "Use Pinctrl IRQ chip" Loading @@ -1618,16 +1611,6 @@ config USE_PINCTRL_IRQ attributes to be configured, prior to configuring them as interrupt triggers. config MSM_RTB_SEPARATE_CPUS bool "Separate entries for each cpu" depends on MSM_RTB depends on SMP help Under some circumstances, it may be beneficial to give dedicated space for each cpu to log accesses. Selecting this option will log each cpu separately. This will guarantee that the last acesses for each cpu will be logged but there will be fewer entries per cpu config MSM_EBI_ERP bool "External Bus Interface (EBI) error reporting" help Loading
arch/arm/mach-msm/Makefile +0 −1 Original line number Diff line number Diff line Loading @@ -195,7 +195,6 @@ obj-$(CONFIG_MSM_RPC_VIBRATOR) += msm_vibrator.o obj-$(CONFIG_MSM_NATIVE_RESTART) += restart.o obj-$(CONFIG_EXTERNAL_MDM) += mdm2.o mdm_common.o obj-$(CONFIG_MSM_RTB) += msm_rtb.o obj-$(CONFIG_MSM_CACHE_ERP) += cache_erp.o obj-$(CONFIG_MSM_EBI_ERP) += ebi_erp.o obj-$(CONFIG_MSM_CACHE_DUMP) += msm_cache_dump.o Loading
arch/arm/mach-msm/hotplug.c +1 −1 Original line number Diff line number Diff line Loading @@ -12,12 +12,12 @@ #include <linux/smp.h> #include <linux/cpu.h> #include <linux/notifier.h> #include <linux/msm_rtb.h> #include <asm/smp_plat.h> #include <asm/vfp.h> #include <mach/jtag.h> #include <mach/msm_rtb.h> #include "pm.h" #include "spm.h" Loading
arch/arm/mm/context.c +1 −2 Original line number Diff line number Diff line Loading @@ -15,14 +15,13 @@ #include <linux/mm.h> #include <linux/smp.h> #include <linux/percpu.h> #include <linux/msm_rtb.h> #include <asm/mmu_context.h> #include <asm/smp_plat.h> #include <asm/thread_notify.h> #include <asm/tlbflush.h> #include <mach/msm_rtb.h> /* * On ARMv6, we have the following structure in the Context ID: * Loading