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Commit 7c811e4b authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86 

* git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86: (24 commits)
  x86: no robust/pi futex for real i386 CPUs
  x86: fix boot failure on 486 due to TSC breakage
  x86: fix build on non-C locales.
  x86: make c_idle.work have a static address.
  x86: don't save unreliable stack trace entries
  x86: don't make swapper_pg_pmd global
  x86: don't print a warning when MTRR are blank and running in KVM
  x86: fix execve with -fstack-protect
  x86: fix vsyscall wreckage
  x86: rename KERNEL_TEXT_SIZE => KERNEL_IMAGE_SIZE
  x86: fix spontaneous reboot with allyesconfig bzImage
  x86: remove double-checking empty zero pages debug
  x86: notsc is ignored on common configurations
  x86/mtrr: fix kernel-doc missing notation
  x86: handle BIOSes which terminate e820 with CF=1 and no SMAP
  x86: add comments for NOPs
  x86: don't use P6_NOPs if compiling with CONFIG_X86_GENERIC
  x86: require family >= 6 if we are using P6 NOPs
  x86: do not promote TM3x00/TM5x00 to i686-class
  x86: hpet fix docbook comment
  ...
parents 37c00b84 f18edc95

arch/x86/Kconfig.cpu

+14 −0
Original line number Original line Diff line number Diff line
@@ -377,6 +377,19 @@ config X86_OOSTORE 
	def_bool y

	def_bool y

	depends on (MWINCHIP3D || MWINCHIP2 || MWINCHIPC6) && MTRR

	depends on (MWINCHIP3D || MWINCHIP2 || MWINCHIPC6) && MTRR





#

# P6_NOPs are a relatively minor optimization that require a family >=

# 6 processor, except that it is broken on certain VIA chips.

# Furthermore, AMD chips prefer a totally different sequence of NOPs

# (which work on all CPUs).  As a result, disallow these if we're

# compiling X86_GENERIC but not X86_64 (these NOPs do work on all

# x86-64 capable chips); the list of processors in the right-hand clause

# are the cores that benefit from this optimization.

#

config X86_P6_NOP

	def_bool y

	depends on (X86_64 || !X86_GENERIC) && (M686 || MPENTIUMII || MPENTIUMIII || MPENTIUMM || MCORE2 || PENTIUM4)



config X86_TSC

config X86_TSC

	def_bool y

	def_bool y

	depends on ((MWINCHIP3D || MWINCHIP2 || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2) && !X86_NUMAQ) || X86_64

	depends on ((MWINCHIP3D || MWINCHIP2 || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2) && !X86_NUMAQ) || X86_64
@@ -390,6 +403,7 @@ config X86_CMOV 
config X86_MINIMUM_CPU_FAMILY

config X86_MINIMUM_CPU_FAMILY

	int

	int

	default "64" if X86_64

	default "64" if X86_64

	default "6" if X86_32 && X86_P6_NOP

	default "4" if X86_32 && (X86_XADD || X86_CMPXCHG || X86_BSWAP || X86_WP_WORKS_OK)

	default "4" if X86_32 && (X86_XADD || X86_CMPXCHG || X86_BSWAP || X86_WP_WORKS_OK)

	default "3"

	default "3"

arch/x86/boot/memory.c

+6 −3
Original line number Original line Diff line number Diff line
@@ -37,6 +37,12 @@ static int detect_memory_e820(void) 
		      "=m" (*desc)

		      "=m" (*desc)

		    : "D" (desc), "d" (SMAP), "a" (0xe820));

		    : "D" (desc), "d" (SMAP), "a" (0xe820));





		/* BIOSes which terminate the chain with CF = 1 as opposed

		   to %ebx = 0 don't always report the SMAP signature on

		   the final, failing, probe. */

		if (err)

			break;



		/* Some BIOSes stop returning SMAP in the middle of

		/* Some BIOSes stop returning SMAP in the middle of

		   the search loop.  We don't know exactly how the BIOS

		   the search loop.  We don't know exactly how the BIOS

		   screwed up the map at that point, we might have a

		   screwed up the map at that point, we might have a
@@ -47,9 +53,6 @@ static int detect_memory_e820(void) 
			break;

			break;

		}

		}





		if (err)

			break;



		count++;

		count++;

		desc++;

		desc++;

	} while (next && count < E820MAX);

	} while (next && count < E820MAX);

arch/x86/kernel/asm-offsets_32.c

+1 −3
Original line number Original line Diff line number Diff line
@@ -128,13 +128,11 @@ void foo(void) 
	OFFSET(XEN_vcpu_info_pending, vcpu_info, evtchn_upcall_pending);

	OFFSET(XEN_vcpu_info_pending, vcpu_info, evtchn_upcall_pending);

#endif

#endif





#ifdef CONFIG_LGUEST_GUEST

#if defined(CONFIG_LGUEST) || defined(CONFIG_LGUEST_GUEST) || defined(CONFIG_LGUEST_MODULE)

	BLANK();

	BLANK();

	OFFSET(LGUEST_DATA_irq_enabled, lguest_data, irq_enabled);

	OFFSET(LGUEST_DATA_irq_enabled, lguest_data, irq_enabled);

	OFFSET(LGUEST_DATA_pgdir, lguest_data, pgdir);

	OFFSET(LGUEST_DATA_pgdir, lguest_data, pgdir);

#endif





#ifdef CONFIG_LGUEST

	BLANK();

	BLANK();

	OFFSET(LGUEST_PAGES_host_gdt_desc, lguest_pages, state.host_gdt_desc);

	OFFSET(LGUEST_PAGES_host_gdt_desc, lguest_pages, state.host_gdt_desc);

	OFFSET(LGUEST_PAGES_host_idt_desc, lguest_pages, state.host_idt_desc);

	OFFSET(LGUEST_PAGES_host_idt_desc, lguest_pages, state.host_idt_desc);

arch/x86/kernel/cpu/common.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -504,7 +504,7 @@ void __cpuinit identify_cpu(struct cpuinfo_x86 *c) 




	/* Clear all flags overriden by options */

	/* Clear all flags overriden by options */

	for (i = 0; i < NCAPINTS; i++)

	for (i = 0; i < NCAPINTS; i++)

		c->x86_capability[i] ^= cleared_cpu_caps[i];

		c->x86_capability[i] &= ~cleared_cpu_caps[i];





	/* Init Machine Check Exception if available. */

	/* Init Machine Check Exception if available. */

	mcheck_init(c);

	mcheck_init(c);

arch/x86/kernel/cpu/mtrr/main.c

+7 −2
Original line number Original line Diff line number Diff line
@@ -43,6 +43,7 @@ 
#include <asm/uaccess.h>

#include <asm/uaccess.h>

#include <asm/processor.h>

#include <asm/processor.h>

#include <asm/msr.h>

#include <asm/msr.h>

#include <asm/kvm_para.h>

#include "mtrr.h"

#include "mtrr.h"





u32 num_var_ranges = 0;

u32 num_var_ranges = 0;
@@ -649,6 +650,7 @@ static __init int amd_special_default_mtrr(void) 




/**

/**

 * mtrr_trim_uncached_memory - trim RAM not covered by MTRRs

 * mtrr_trim_uncached_memory - trim RAM not covered by MTRRs

 * @end_pfn: ending page frame number

 *

 *

 * Some buggy BIOSes don't setup the MTRRs properly for systems with certain

 * Some buggy BIOSes don't setup the MTRRs properly for systems with certain

 * memory configurations.  This routine checks that the highest MTRR matches

 * memory configurations.  This routine checks that the highest MTRR matches
@@ -688,8 +690,11 @@ int __init mtrr_trim_uncached_memory(unsigned long end_pfn) 




	/* kvm/qemu doesn't have mtrr set right, don't trim them all */

	/* kvm/qemu doesn't have mtrr set right, don't trim them all */

	if (!highest_pfn) {

	if (!highest_pfn) {

		printk(KERN_WARNING "WARNING: strange, CPU MTRRs all blank?\n");

		if (!kvm_para_available()) {

			printk(KERN_WARNING

				"WARNING: strange, CPU MTRRs all blank?\n");

			WARN_ON(1);

			WARN_ON(1);

		}

		return 0;

		return 0;

	}

	}