Merge "mmc: sdhci-msm: Fix issue with 1.8v switch sequence in 3.10 kernel" (787e11be) · Commits · e / devices / samsung / android_kernel_samsung_msm8916

drivers/mmc/core/core.c

+5 −0

Original line number	Diff line number	Diff line
		@@ -1893,6 +1893,7 @@ int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage)
		* During a signal voltage level switch, the clock must be gated
		* for 5 ms according to the SD spec
		*/
		host->card_clock_off = true;
		clock = host->ios.clock;
		host->ios.clock = 0;
		mmc_set_ios(host);
		@@ -1903,6 +1904,9 @@ int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage)
		* sent CMD11, so a power cycle is required anyway
		*/
		err = -EAGAIN;
		host->ios.clock = clock;
		mmc_set_ios(host);
		host->card_clock_off = false;
		goto power_cycle;
		}

		@@ -1911,6 +1915,7 @@ int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage)
		host->ios.clock = clock;
		mmc_set_ios(host);

		host->card_clock_off = false;
		/* Wait for at least 1 ms according to spec */
		mmc_delay(1);

+10 −2

Original line number	Diff line number	Diff line
		@@ -2432,10 +2432,18 @@ static int sdhci_msm_prepare_clocks(struct sdhci_host *host, bool enable)
		mb();

		} else if (!enable && atomic_read(&msm_host->clks_on)) {
		pr_debug("%s: request to disable clocks\n",
		mmc_hostname(host->mmc));
		sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
		mb();
		/*
		* During 1.8V signal switching the clock source must
		* still be ON as it requires accessing SDHC
		* registers (SDHCi host control2 register bit 3 must
		* be written and polled after stopping the SDCLK).
		*/
		if (host->mmc->card_clock_off)
		return 0;
		pr_debug("%s: request to disable clocks\n",
		mmc_hostname(host->mmc));
		if (!IS_ERR_OR_NULL(msm_host->sleep_clk))
		clk_disable_unprepare(msm_host->sleep_clk);
		if (!IS_ERR_OR_NULL(msm_host->ff_clk))

+5 −0

Original line number	Diff line number	Diff line
		@@ -448,6 +448,11 @@ struct mmc_host {
		enum mmc_load state;
		} clk_scaling;
		enum dev_state dev_status;
		/*
		* Set to 1 to just stop the SDCLK to the card without
		* actually disabling the clock from it's source.
		*/
		bool card_clock_off;
		unsigned long private[0] ____cacheline_aligned;
		};