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Commit 6f7c8623 authored by Manuel Lauss's avatar Manuel Lauss Committed by Ralf Baechle
Browse files

MIPS: Alchemy: Merge PB1200 support into DB1200 code. 



The PB1200 is basically a DB1200 with additional MMC and camera sockets
and different base addresses for external hardware (CPLD, IDE, Net, NAND).

This patch implements the missing PB1200 features in DB1200 support code
and runtime board detection.

Tested on DB1200 only.

Signed-off-by: default avatarManuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2880/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent a9b71a8f

arch/mips/alchemy/Kconfig

+1 −9
Original line number Diff line number Diff line
@@ -42,7 +42,7 @@ config MIPS_DB1100 
	select SYS_HAS_EARLY_PRINTK



config MIPS_DB1200

	bool "Alchemy DB1200 board"

	bool "Alchemy DB1200/PB1200 board"

	select ALCHEMY_GPIOINT_AU1000

	select DMA_COHERENT

	select MIPS_DISABLE_OBSOLETE_IDE
@@ -85,14 +85,6 @@ config MIPS_PB1100 
	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_HAS_EARLY_PRINTK



config MIPS_PB1200

	bool "Alchemy PB1200 board"

	select ALCHEMY_GPIOINT_AU1000

	select DMA_NONCOHERENT

	select MIPS_DISABLE_OBSOLETE_IDE

	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_HAS_EARLY_PRINTK



config MIPS_PB1500

	bool "Alchemy PB1500 board"

	select ALCHEMY_GPIOINT_AU1000

arch/mips/alchemy/Platform

+1 −8
Original line number Diff line number Diff line
@@ -25,13 +25,6 @@ platform-$(CONFIG_MIPS_PB1550) += alchemy/devboards/ 
cflags-$(CONFIG_MIPS_PB1550)	+= -I$(srctree)/arch/mips/include/asm/mach-pb1x00

load-$(CONFIG_MIPS_PB1550)	+= 0xffffffff80100000



#

# AMD Alchemy Pb1200 eval board

#

platform-$(CONFIG_MIPS_PB1200)	+= alchemy/devboards/

cflags-$(CONFIG_MIPS_PB1200)	+= -I$(srctree)/arch/mips/include/asm/mach-pb1x00

load-$(CONFIG_MIPS_PB1200)	+= 0xffffffff80100000



#

# AMD Alchemy Db1000 eval board

#
@@ -61,7 +54,7 @@ cflags-$(CONFIG_MIPS_DB1550) += -I$(srctree)/arch/mips/include/asm/mach-db1x00 
load-$(CONFIG_MIPS_DB1550)	+= 0xffffffff80100000



#

# AMD Alchemy Db1200 eval board

# AMD Alchemy Db1200/Pb1200 eval boards

#

platform-$(CONFIG_MIPS_DB1200)	+= alchemy/devboards/

cflags-$(CONFIG_MIPS_DB1200)	+= -I$(srctree)/arch/mips/include/asm/mach-db1x00

arch/mips/alchemy/devboards/Makefile

+0 −1
Original line number Diff line number Diff line
@@ -5,7 +5,6 @@ 
obj-y += prom.o bcsr.o platform.o

obj-$(CONFIG_PM)		+= pm.o

obj-$(CONFIG_MIPS_PB1100)	+= pb1100.o

obj-$(CONFIG_MIPS_PB1200)	+= pb1200.o

obj-$(CONFIG_MIPS_PB1500)	+= pb1500.o

obj-$(CONFIG_MIPS_PB1550)	+= pb1550.o

obj-$(CONFIG_MIPS_DB1000)	+= db1x00.o

arch/mips/alchemy/devboards/db1200.c

+227 −18
Original line number Diff line number Diff line 
/*

 * DBAu1200 board platform device registration

 * DBAu1200/PBAu1200 board platform device registration

 *

 * Copyright (C) 2008-2011 Manuel Lauss

 *
@@ -44,10 +44,41 @@ 


#include "platform.h"



static const char *board_type_str(void)

{

	switch (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI))) {

	case BCSR_WHOAMI_PB1200_DDR1:

	case BCSR_WHOAMI_PB1200_DDR2:

		return "PB1200";

	case BCSR_WHOAMI_DB1200:

		return "DB1200";

	default:

		return "(unknown)";

	}

}



const char *get_system_type(void)

{

	return "DB1200";

	return board_type_str();

}



static int __init detect_board(void)

{

	int bid;



	/* try the PB1200 first */

	bcsr_init(PB1200_BCSR_PHYS_ADDR,

		  PB1200_BCSR_PHYS_ADDR + PB1200_BCSR_HEXLED_OFS);

	bid = BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI));

	if ((bid == BCSR_WHOAMI_PB1200_DDR1) ||

	    (bid == BCSR_WHOAMI_PB1200_DDR2))

		return 0;



	/* okay, try the DB1200 then */

	bcsr_init(DB1200_BCSR_PHYS_ADDR,

		  DB1200_BCSR_PHYS_ADDR + DB1200_BCSR_HEXLED_OFS);

	bid = BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI));

	return bid == BCSR_WHOAMI_DB1200 ? 0 : 1;

}



void __init board_setup(void)
@@ -55,12 +86,14 @@ void __init board_setup(void) 
	unsigned long freq0, clksrc, div, pfc;

	unsigned short whoami;



	bcsr_init(DB1200_BCSR_PHYS_ADDR,

		  DB1200_BCSR_PHYS_ADDR + DB1200_BCSR_HEXLED_OFS);

	if (detect_board()) {

		printk(KERN_ERR "NOT running on a DB1200/PB1200 board!\n");

		return;

	}



	whoami = bcsr_read(BCSR_WHOAMI);

	printk(KERN_INFO "Alchemy/AMD/RMI DB1200 Board, CPLD Rev %d"

		"  Board-ID %d  Daughtercard ID %d\n",

	printk(KERN_INFO "Alchemy/AMD/RMI %s Board, CPLD Rev %d"

		"  Board-ID %d  Daughtercard ID %d\n", board_type_str(),

		(whoami >> 4) & 0xf, (whoami >> 8) & 0xf, whoami & 0xf);



	/* SMBus/SPI on PSC0, Audio on PSC1 */
@@ -96,7 +129,7 @@ void __init board_setup(void) 


static struct mtd_partition db1200_spiflash_parts[] = {

	{

		.name	= "DB1200 SPI flash",

		.name	= "spi_flash",

		.offset	= 0,

		.size	= MTDPART_SIZ_FULL,

	},
@@ -376,12 +409,109 @@ static struct led_classdev db1200_mmc_led = { 
	.brightness_set	= db1200_mmcled_set,

};



static struct au1xmmc_platform_data db1200mmc_platdata = {

/* -- */



static irqreturn_t pb1200_mmc1_cd(int irq, void *ptr)

{

	void(*mmc_cd)(struct mmc_host *, unsigned long);



	if (irq == PB1200_SD1_INSERT_INT) {

		disable_irq_nosync(PB1200_SD1_INSERT_INT);

		enable_irq(PB1200_SD1_EJECT_INT);

	} else {

		disable_irq_nosync(PB1200_SD1_EJECT_INT);

		enable_irq(PB1200_SD1_INSERT_INT);

	}



	/* link against CONFIG_MMC=m */

	mmc_cd = symbol_get(mmc_detect_change);

	if (mmc_cd) {

		mmc_cd(ptr, msecs_to_jiffies(500));

		symbol_put(mmc_detect_change);

	}



	return IRQ_HANDLED;

}



static int pb1200_mmc1_cd_setup(void *mmc_host, int en)

{

	int ret;



	if (en) {

		ret = request_irq(PB1200_SD1_INSERT_INT, pb1200_mmc1_cd, 0,

				  "sd1_insert", mmc_host);

		if (ret)

			goto out;



		ret = request_irq(PB1200_SD1_EJECT_INT, pb1200_mmc1_cd, 0,

				  "sd1_eject", mmc_host);

		if (ret) {

			free_irq(PB1200_SD1_INSERT_INT, mmc_host);

			goto out;

		}



		if (bcsr_read(BCSR_SIGSTAT) & BCSR_INT_SD1INSERT)

			enable_irq(PB1200_SD1_EJECT_INT);

		else

			enable_irq(PB1200_SD1_INSERT_INT);



	} else {

		free_irq(PB1200_SD1_INSERT_INT, mmc_host);

		free_irq(PB1200_SD1_EJECT_INT, mmc_host);

	}

	ret = 0;

out:

	return ret;

}



static void pb1200_mmc1led_set(struct led_classdev *led,

			enum led_brightness brightness)

{

	if (brightness != LED_OFF)

			bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED1, 0);

	else

			bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED1);

}



static struct led_classdev pb1200_mmc1_led = {

	.brightness_set	= pb1200_mmc1led_set,

};



static void pb1200_mmc1_set_power(void *mmc_host, int state)

{

	if (state) {

		bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_SD1PWR);

		msleep(400);	/* stabilization time */

	} else

		bcsr_mod(BCSR_BOARD, BCSR_BOARD_SD1PWR, 0);

}



static int pb1200_mmc1_card_readonly(void *mmc_host)

{

	return (bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD1WP) ? 1 : 0;

}



static int pb1200_mmc1_card_inserted(void *mmc_host)

{

	return (bcsr_read(BCSR_SIGSTAT) & BCSR_INT_SD1INSERT) ? 1 : 0;

}





static struct au1xmmc_platform_data db1200_mmc_platdata[2] = {

	[0] = {

		.cd_setup	= db1200_mmc_cd_setup,

		.set_power	= db1200_mmc_set_power,

		.card_inserted	= db1200_mmc_card_inserted,

		.card_readonly	= db1200_mmc_card_readonly,

		.led		= &db1200_mmc_led,

	},

	[1] = {

		.cd_setup	= pb1200_mmc1_cd_setup,

		.set_power	= pb1200_mmc1_set_power,

		.card_inserted	= pb1200_mmc1_card_inserted,

		.card_readonly	= pb1200_mmc1_card_readonly,

		.led		= &pb1200_mmc1_led,

	},

};



static struct resource au1200_mmc0_resources[] = {
@@ -415,12 +545,47 @@ static struct platform_device db1200_mmc0_dev = { 
	.dev = {

		.dma_mask		= &au1xxx_mmc_dmamask,

		.coherent_dma_mask	= DMA_BIT_MASK(32),

		.platform_data		= &db1200mmc_platdata,

		.platform_data		= &db1200_mmc_platdata[0],

	},

	.num_resources	= ARRAY_SIZE(au1200_mmc0_resources),

	.resource	= au1200_mmc0_resources,

};



static struct resource au1200_mmc1_res[] = {

	[0] = {

		.start	= AU1100_SD1_PHYS_ADDR,

		.end	= AU1100_SD1_PHYS_ADDR + 0xfff,

		.flags	= IORESOURCE_MEM,

	},

	[1] = {

		.start	= AU1200_SD_INT,

		.end	= AU1200_SD_INT,

		.flags	= IORESOURCE_IRQ,

	},

	[2] = {

		.start	= AU1200_DSCR_CMD0_SDMS_TX1,

		.end	= AU1200_DSCR_CMD0_SDMS_TX1,

		.flags	= IORESOURCE_DMA,

	},

	[3] = {

		.start	= AU1200_DSCR_CMD0_SDMS_RX1,

		.end	= AU1200_DSCR_CMD0_SDMS_RX1,

		.flags	= IORESOURCE_DMA,

	}

};



static struct platform_device pb1200_mmc1_dev = {

	.name		= "au1xxx-mmc",

	.id		= 1,

	.dev = {

		.dma_mask		= &au1xxx_mmc_dmamask,

		.coherent_dma_mask	= DMA_BIT_MASK(32),

		.platform_data		= &db1200_mmc_platdata[1],

	},

	.num_resources	= ARRAY_SIZE(au1200_mmc1_res),

	.resource	= au1200_mmc1_res,

};



/**********************************************************************/



static int db1200fb_panel_index(void)
@@ -598,14 +763,50 @@ static struct platform_device *db1200_devs[] __initdata = { 
	&db1200_sound_dev,

};



static struct platform_device *pb1200_devs[] __initdata = {

	&pb1200_mmc1_dev,

};



/* Some peripheral base addresses differ on the PB1200 */

static int __init pb1200_res_fixup(void)

{

	/* CPLD Revs earlier than 4 cause problems */

	if (BCSR_WHOAMI_CPLD(bcsr_read(BCSR_WHOAMI)) <= 3) {

		printk(KERN_ERR "WARNING!!!\n");

		printk(KERN_ERR "WARNING!!!\n");

		printk(KERN_ERR "PB1200 must be at CPLD rev 4. Please have\n");

		printk(KERN_ERR "the board updated to latest revisions.\n");

		printk(KERN_ERR "This software will not work reliably\n");

		printk(KERN_ERR "on anything older than CPLD rev 4.!\n");

		printk(KERN_ERR "WARNING!!!\n");

		printk(KERN_ERR "WARNING!!!\n");

		return 1;

	}



	db1200_nand_res[0].start = PB1200_NAND_PHYS_ADDR;

	db1200_nand_res[0].end   = PB1200_NAND_PHYS_ADDR + 0xff;

	db1200_ide_res[0].start = PB1200_IDE_PHYS_ADDR;

	db1200_ide_res[0].end   = PB1200_IDE_PHYS_ADDR + DB1200_IDE_PHYS_LEN - 1;

	db1200_eth_res[0].start = PB1200_ETH_PHYS_ADDR;

	db1200_eth_res[0].end   = PB1200_ETH_PHYS_ADDR + 0xff;

	return 0;

}



static int __init db1200_dev_init(void)

{

	unsigned long pfc;

	unsigned short sw;

	int swapped;

	int swapped, bid;



	bid = BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI));

	if ((bid == BCSR_WHOAMI_PB1200_DDR1) ||

	    (bid == BCSR_WHOAMI_PB1200_DDR2)) {

		if (pb1200_res_fixup())

			return -ENODEV;

	}



	/* GPIO7 is low-level triggered CPLD cascade */

	irq_set_irq_type(AU1200_GPIO7_INT, IRQF_TRIGGER_LOW);

	irq_set_irq_type(AU1200_GPIO7_INT, IRQ_TYPE_LEVEL_LOW);

	bcsr_init_irq(DB1200_INT_BEGIN, DB1200_INT_END, AU1200_GPIO7_INT);



	/* insert/eject pairs: one of both is always screaming.  To avoid
@@ -626,6 +827,7 @@ static int __init db1200_dev_init(void) 


	/* SWITCHES:	S6.8 I2C/SPI selector  (OFF=I2C  ON=SPI)

	 *		S6.7 AC97/I2S selector (OFF=AC97 ON=I2S)

	 *		or S12 on the PB1200.

	 */



	/* NOTE: GPIO215 controls OTG VBUS supply.  In SPI mode however
@@ -640,7 +842,7 @@ static int __init db1200_dev_init(void) 
	gpio_request(215, "otg-vbus");

	gpio_direction_output(215, 1);



	printk(KERN_INFO "DB1200 device configuration:\n");

	printk(KERN_INFO "%s device configuration:\n", board_type_str());



	sw = bcsr_read(BCSR_SWITCHES);

	if (sw & BCSR_SWITCHES_DIP_8) {
@@ -707,6 +909,13 @@ static int __init db1200_dev_init(void) 
	swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1200_SWAPBOOT;

	db1x_register_norflash(64 << 20, 2, swapped);



	return platform_add_devices(db1200_devs, ARRAY_SIZE(db1200_devs));

	platform_add_devices(db1200_devs, ARRAY_SIZE(db1200_devs));



	/* PB1200 is a DB1200 with a 2nd MMC and Camera connector */

	if ((bid == BCSR_WHOAMI_PB1200_DDR1) ||

	    (bid == BCSR_WHOAMI_PB1200_DDR2))

		platform_add_devices(pb1200_devs, ARRAY_SIZE(pb1200_devs));



	return 0;

}

device_initcall(db1200_dev_init);

arch/mips/alchemy/devboards/pb1200.c

deleted100644 → 0
+0 −471
Original line number Diff line number Diff line 
/*

 * Pb1200/DBAu1200 board platform device registration

 *

 * Copyright (C) 2008 MontaVista Software Inc. <source@mvista.com>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA

 */



#include <linux/dma-mapping.h>

#include <linux/init.h>

#include <linux/interrupt.h>

#include <linux/leds.h>

#include <linux/platform_device.h>

#include <linux/smc91x.h>

#include <asm/mach-au1x00/au1000.h>

#include <asm/mach-au1x00/au1100_mmc.h>

#include <asm/mach-au1x00/au1200fb.h>

#include <asm/mach-au1x00/au1xxx_dbdma.h>

#include <asm/mach-db1x00/bcsr.h>

#include <asm/mach-pb1x00/pb1200.h>

#include <prom.h>

#include "platform.h"





const char *get_system_type(void)

{

	return "PB1200";

}



void __init board_setup(void)

{

	printk(KERN_INFO "AMD Alchemy Pb1200 Board\n");

	bcsr_init(PB1200_BCSR_PHYS_ADDR,

		  PB1200_BCSR_PHYS_ADDR + PB1200_BCSR_HEXLED_OFS);



#if 0

	{

		u32 pin_func;



		/*

		 * Enable PSC1 SYNC for AC97.  Normaly done in audio driver,

		 * but it is board specific code, so put it here.

		 */

		pin_func = au_readl(SYS_PINFUNC);

		au_sync();

		pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;

		au_writel(pin_func, SYS_PINFUNC);



		au_writel(0, (u32)bcsr | 0x10); /* turn off PCMCIA power */

		au_sync();

	}

#endif



#if defined(CONFIG_I2C_AU1550)

	{

		u32 freq0, clksrc;

		u32 pin_func;



		/* Select SMBus in CPLD */

		bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);



		pin_func = au_readl(SYS_PINFUNC);

		au_sync();

		pin_func &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B);

		/* Set GPIOs correctly */

		pin_func |= 2 << 17;

		au_writel(pin_func, SYS_PINFUNC);

		au_sync();



		/* The I2C driver depends on 50 MHz clock */

		freq0 = au_readl(SYS_FREQCTRL0);

		au_sync();

		freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);

		freq0 |= 3 << SYS_FC_FRDIV1_BIT;

		/* 396 MHz / (3 + 1) * 2 == 49.5 MHz */

		au_writel(freq0, SYS_FREQCTRL0);

		au_sync();

		freq0 |= SYS_FC_FE1;

		au_writel(freq0, SYS_FREQCTRL0);

		au_sync();



		clksrc = au_readl(SYS_CLKSRC);

		au_sync();

		clksrc &= ~(SYS_CS_CE0 | SYS_CS_DE0 | SYS_CS_ME0_MASK);

		/* Bit 22 is EXTCLK0 for PSC0 */

		clksrc |= SYS_CS_MUX_FQ1 << SYS_CS_ME0_BIT;

		au_writel(clksrc, SYS_CLKSRC);

		au_sync();

	}

#endif



	/*

	 * The Pb1200 development board uses external MUX for PSC0 to

	 * support SMB/SPI. bcsr_resets bit 12: 0=SMB 1=SPI

	 */

#ifdef CONFIG_I2C_AU1550

	bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);

#endif

	au_sync();

}



/******************************************************************************/



static int mmc_activity;



static void pb1200mmc0_set_power(void *mmc_host, int state)

{

	if (state)

		bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_SD0PWR);

	else

		bcsr_mod(BCSR_BOARD, BCSR_BOARD_SD0PWR, 0);



	msleep(1);

}



static int pb1200mmc0_card_readonly(void *mmc_host)

{

	return (bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD0WP) ? 1 : 0;

}



static int pb1200mmc0_card_inserted(void *mmc_host)

{

	return (bcsr_read(BCSR_SIGSTAT) & BCSR_INT_SD0INSERT) ? 1 : 0;

}



static void pb1200_mmcled_set(struct led_classdev *led,

			enum led_brightness brightness)

{

	if (brightness != LED_OFF) {

		if (++mmc_activity == 1)

			bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED0, 0);

	} else {

		if (--mmc_activity == 0)

			bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED0);

	}

}



static struct led_classdev pb1200mmc_led = {

	.brightness_set	= pb1200_mmcled_set,

};



static void pb1200mmc1_set_power(void *mmc_host, int state)

{

	if (state)

		bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_SD1PWR);

	else

		bcsr_mod(BCSR_BOARD, BCSR_BOARD_SD1PWR, 0);



	msleep(1);

}



static int pb1200mmc1_card_readonly(void *mmc_host)

{

	return (bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD1WP) ? 1 : 0;

}



static int pb1200mmc1_card_inserted(void *mmc_host)

{

	return (bcsr_read(BCSR_SIGSTAT) & BCSR_INT_SD1INSERT) ? 1 : 0;

}



static struct au1xmmc_platform_data pb1200mmc_platdata[2] = {

	[0] = {

		.set_power	= pb1200mmc0_set_power,

		.card_inserted	= pb1200mmc0_card_inserted,

		.card_readonly	= pb1200mmc0_card_readonly,

		.cd_setup	= NULL,		/* use poll-timer in driver */

		.led		= &pb1200mmc_led,

	},

	[1] = {

		.set_power	= pb1200mmc1_set_power,

		.card_inserted	= pb1200mmc1_card_inserted,

		.card_readonly	= pb1200mmc1_card_readonly,

		.cd_setup	= NULL,		/* use poll-timer in driver */

		.led		= &pb1200mmc_led,

	},

};



static u64 au1xxx_mmc_dmamask =  DMA_BIT_MASK(32);



static struct resource au1200_mmc0_res[] = {

	[0] = {

		.start	= AU1100_SD0_PHYS_ADDR,

		.end	= AU1100_SD0_PHYS_ADDR + 0xfff,

		.flags	= IORESOURCE_MEM,

	},

	[1] = {

		.start	= AU1200_SD_INT,

		.end	= AU1200_SD_INT,

		.flags	= IORESOURCE_IRQ,

	},

	[2] = {

		.start	= AU1200_DSCR_CMD0_SDMS_TX0,

		.end	= AU1200_DSCR_CMD0_SDMS_TX0,

		.flags	= IORESOURCE_DMA,

	},

	[3] = {

		.start	= AU1200_DSCR_CMD0_SDMS_RX0,

		.end	= AU1200_DSCR_CMD0_SDMS_RX0,

		.flags	= IORESOURCE_DMA,

	}

};



static struct platform_device pb1200_mmc0_dev = {

	.name		= "au1xxx-mmc",

	.id		= 0,

	.dev = {

		.dma_mask		= &au1xxx_mmc_dmamask,

		.coherent_dma_mask	= DMA_BIT_MASK(32),

		.platform_data		= &pb1200mmc_platdata[0],

	},

	.num_resources	= ARRAY_SIZE(au1200_mmc0_res),

	.resource	= au1200_mmc0_res,

};



static struct resource au1200_mmc1_res[] = {

	[0] = {

		.start	= AU1100_SD1_PHYS_ADDR,

		.end	= AU1100_SD1_PHYS_ADDR + 0xfff,

		.flags	= IORESOURCE_MEM,

	},

	[1] = {

		.start	= AU1200_SD_INT,

		.end	= AU1200_SD_INT,

		.flags	= IORESOURCE_IRQ,

	},

	[2] = {

		.start	= AU1200_DSCR_CMD0_SDMS_TX1,

		.end	= AU1200_DSCR_CMD0_SDMS_TX1,

		.flags	= IORESOURCE_DMA,

	},

	[3] = {

		.start	= AU1200_DSCR_CMD0_SDMS_RX1,

		.end	= AU1200_DSCR_CMD0_SDMS_RX1,

		.flags	= IORESOURCE_DMA,

	}

};



static struct platform_device pb1200_mmc1_dev = {

	.name		= "au1xxx-mmc",

	.id		= 1,

	.dev = {

		.dma_mask		= &au1xxx_mmc_dmamask,

		.coherent_dma_mask	= DMA_BIT_MASK(32),

		.platform_data		= &pb1200mmc_platdata[1],

	},

	.num_resources	= ARRAY_SIZE(au1200_mmc1_res),

	.resource	= au1200_mmc1_res,

};





static struct resource ide_resources[] = {

	[0] = {

		.start	= IDE_PHYS_ADDR,

		.end	= IDE_PHYS_ADDR + IDE_PHYS_LEN - 1,

		.flags	= IORESOURCE_MEM

	},

	[1] = {

		.start	= IDE_INT,

		.end	= IDE_INT,

		.flags	= IORESOURCE_IRQ

	},

	[2] = {

		.start	= AU1200_DSCR_CMD0_DMA_REQ1,

		.end	= AU1200_DSCR_CMD0_DMA_REQ1,

		.flags	= IORESOURCE_DMA,

	},

};



static u64 au1200_ide_dmamask = DMA_BIT_MASK(32);



static struct platform_device ide_device = {

	.name		= "au1200-ide",

	.id		= 0,

	.dev = {

		.dma_mask		= &au1200_ide_dmamask,

		.coherent_dma_mask	= DMA_BIT_MASK(32),

	},

	.num_resources	= ARRAY_SIZE(ide_resources),

	.resource	= ide_resources

};



static struct smc91x_platdata smc_data = {

	.flags	= SMC91X_NOWAIT | SMC91X_USE_16BIT,

	.leda	= RPC_LED_100_10,

	.ledb	= RPC_LED_TX_RX,

};



static struct resource smc91c111_resources[] = {

	[0] = {

		.name	= "smc91x-regs",

		.start	= SMC91C111_PHYS_ADDR,

		.end	= SMC91C111_PHYS_ADDR + 0xf,

		.flags	= IORESOURCE_MEM

	},

	[1] = {

		.start	= SMC91C111_INT,

		.end	= SMC91C111_INT,

		.flags	= IORESOURCE_IRQ

	},

};



static struct platform_device smc91c111_device = {

	.dev	= {

		.platform_data	= &smc_data,

	},

	.name		= "smc91x",

	.id		= -1,

	.num_resources	= ARRAY_SIZE(smc91c111_resources),

	.resource	= smc91c111_resources

};



static struct resource au1200_psc0_res[] = {

	[0] = {

		.start	= AU1550_PSC0_PHYS_ADDR,

		.end	= AU1550_PSC0_PHYS_ADDR + 0xfff,

		.flags	= IORESOURCE_MEM,

	},

	[1] = {

		.start	= AU1200_PSC0_INT,

		.end	= AU1200_PSC0_INT,

		.flags	= IORESOURCE_IRQ,

	},

	[2] = {

		.start	= AU1200_DSCR_CMD0_PSC0_TX,

		.end	= AU1200_DSCR_CMD0_PSC0_TX,

		.flags	= IORESOURCE_DMA,

	},

	[3] = {

		.start	= AU1200_DSCR_CMD0_PSC0_RX,

		.end	= AU1200_DSCR_CMD0_PSC0_RX,

		.flags	= IORESOURCE_DMA,

	},

};



static struct platform_device pb1200_i2c_dev = {

	.name		= "au1xpsc_smbus",

	.id		= 0,	/* bus number */

	.num_resources	= ARRAY_SIZE(au1200_psc0_res),

	.resource	= au1200_psc0_res,

};



static int pb1200fb_panel_index(void)

{

	return (bcsr_read(BCSR_SWITCHES) >> 8) & 0x0f;

}



static int pb1200fb_panel_init(void)

{

	/* Apply power */

	bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |

				BCSR_BOARD_LCDBL);

	return 0;

}



static int pb1200fb_panel_shutdown(void)

{

	/* Remove power */

	bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |

			     BCSR_BOARD_LCDBL, 0);

	return 0;

}



static struct au1200fb_platdata pb1200fb_pd = {

	.panel_index	= pb1200fb_panel_index,

	.panel_init	= pb1200fb_panel_init,

	.panel_shutdown	= pb1200fb_panel_shutdown,

};



static struct resource au1200_lcd_res[] = {

	[0] = {

		.start	= AU1200_LCD_PHYS_ADDR,

		.end	= AU1200_LCD_PHYS_ADDR + 0x800 - 1,

		.flags	= IORESOURCE_MEM,

	},

	[1] = {

		.start	= AU1200_LCD_INT,

		.end	= AU1200_LCD_INT,

		.flags	= IORESOURCE_IRQ,

	}

};



static u64 au1200_lcd_dmamask = DMA_BIT_MASK(32);



static struct platform_device pb1200_lcd_dev = {

	.name		= "au1200-lcd",

	.id		= 0,

	.dev = {

		.dma_mask		= &au1200_lcd_dmamask,

		.coherent_dma_mask	= DMA_BIT_MASK(32),

		.platform_data		= &pb1200fb_pd,

	},

	.num_resources	= ARRAY_SIZE(au1200_lcd_res),

	.resource	= au1200_lcd_res,

};



static struct platform_device *board_platform_devices[] __initdata = {

	&ide_device,

	&smc91c111_device,

	&pb1200_i2c_dev,

	&pb1200_mmc0_dev,

	&pb1200_mmc1_dev,

	&pb1200_lcd_dev,

};



static int __init board_register_devices(void)

{

	int swapped;



	/* We have a problem with CPLD rev 3. */

	if (BCSR_WHOAMI_CPLD(bcsr_read(BCSR_WHOAMI)) <= 3) {

		printk(KERN_ERR "WARNING!!!\n");

		printk(KERN_ERR "WARNING!!!\n");

		printk(KERN_ERR "WARNING!!!\n");

		printk(KERN_ERR "WARNING!!!\n");

		printk(KERN_ERR "WARNING!!!\n");

		printk(KERN_ERR "WARNING!!!\n");

		printk(KERN_ERR "Pb1200 must be at CPLD rev 4. Please have Pb1200\n");

		printk(KERN_ERR "updated to latest revision. This software will\n");

		printk(KERN_ERR "not work on anything less than CPLD rev 4.\n");

		printk(KERN_ERR "WARNING!!!\n");

		printk(KERN_ERR "WARNING!!!\n");

		printk(KERN_ERR "WARNING!!!\n");

		printk(KERN_ERR "WARNING!!!\n");

		printk(KERN_ERR "WARNING!!!\n");

		printk(KERN_ERR "WARNING!!!\n");

		panic("Game over.  Your score is 0.");

	}



	irq_set_irq_type(AU1200_GPIO7_INT, IRQF_TRIGGER_LOW);

	bcsr_init_irq(PB1200_INT_BEGIN, PB1200_INT_END, AU1200_GPIO7_INT);



	db1x_register_pcmcia_socket(

		AU1000_PCMCIA_ATTR_PHYS_ADDR,

		AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,

		AU1000_PCMCIA_MEM_PHYS_ADDR,

		AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x000400000 - 1,

		AU1000_PCMCIA_IO_PHYS_ADDR,

		AU1000_PCMCIA_IO_PHYS_ADDR   + 0x000010000 - 1,

		PB1200_PC0_INT, PB1200_PC0_INSERT_INT,

		/*PB1200_PC0_STSCHG_INT*/0, PB1200_PC0_EJECT_INT, 0);



	db1x_register_pcmcia_socket(

		AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x008000000,

		AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x008400000 - 1,

		AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x008000000,

		AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x008400000 - 1,

		AU1000_PCMCIA_IO_PHYS_ADDR   + 0x008000000,

		AU1000_PCMCIA_IO_PHYS_ADDR   + 0x008010000 - 1,

		PB1200_PC1_INT, PB1200_PC1_INSERT_INT,

		/*PB1200_PC1_STSCHG_INT*/0, PB1200_PC1_EJECT_INT, 1);



	swapped = bcsr_read(BCSR_STATUS) &  BCSR_STATUS_DB1200_SWAPBOOT;

	db1x_register_norflash(128 * 1024 * 1024, 2, swapped);



	return platform_add_devices(board_platform_devices,

				    ARRAY_SIZE(board_platform_devices));

}

device_initcall(board_register_devices);