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Commit 59c49729 authored by Krishna Konda's avatar Krishna Konda Committed by Stepan Moskovchenko
Browse files

ARM: dts: add sdhc1 and sdhc2 devices for apq8084



Add device tree entries for SDHC1 and SDHC2 devices.

Change-Id: Ida44099e0d37389bc1e74aa8683e2641333737e3
Signed-off-by: default avatarKrishna Konda <kkonda@codeaurora.org>
Signed-off-by: default avatarVenkat Gopalakrishnan <venkatg@codeaurora.org>
parent 72765263
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+36 −2
Original line number Diff line number Diff line
@@ -52,10 +52,28 @@
	qcom,sup-voltages = <2950 2950>;
	qcom,nonremovable;
	qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";

	status = "ok";
};

&sdhc_1 {
	qcom,vdd-voltage-level = <2950000 2950000>;
	qcom,vdd-current-level = <800 500000>;

	qcom,vdd-io-always-on;
	qcom,vdd-io-voltage-level = <1800000 1800000>;
	qcom,vdd-io-current-level = <250 154000>;

	qcom,pad-pull-on = <0x0 0x3 0x3 0x1>; /* no-pull, pull-up, pull-up, pull-down */
	qcom,pad-pull-off = <0x0 0x3 0x3 0x1>; /* no-pull, pull-up, pull-up, pull-down */
	qcom,pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
	qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */

	qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000 400000000>;
	qcom,nonremovable;
	qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v";
	status = "disabled";
};

&sdcc2 {
	vdd-supply = <&pma8084_l21>;
	vdd-io-supply = <&pma8084_l13>;
@@ -76,10 +94,26 @@
	qcom,xpc;
	qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
	qcom,current-limit = <800>;

	status = "ok";
};

&sdhc_2 {
	qcom,vdd-voltage-level = <2950000 2950000>;
	qcom,vdd-current-level = <9000 800000>;

	qcom,vdd-io-voltage-level = <1800000 2950000>;
	qcom,vdd-io-current-level = <6 22000>;

	qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
	qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
	qcom,pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
	qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */

	qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>;
	qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
	status = "disabled";
};

&pma8084_gpios {
	gpio@c000 { /* GPIO 1 */
	};
+29 −0
Original line number Diff line number Diff line
@@ -17,6 +17,12 @@
	compatible = "qcom,apq8084";
	qcom,msm-id = <178 0x10000>;
	interrupt-parent = <&intc>;

	aliases {
		sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
		sdhc2 = &sdhc_2; /* SDC2 SD card slot */
	};

	soc: soc { };
};

@@ -188,6 +194,18 @@
		status = "disabled";
	};

	sdhc_1: sdhci@f9824900 {
		compatible = "qcom,sdhci-msm";
		reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>;
		reg-names = "hc_mem", "core_mem";

		interrupts = <0 123 0>, <0 138 0>;
		interrupt-names = "hc_irq", "pwr_irq";

		qcom,bus-width = <8>;
		status = "disabled";
	};

	sdcc2: qcom,sdcc@f98a4000 {
		cell-index = <2>; /* SDC2 SD card slot */
		compatible = "qcom,msm-sdcc";
@@ -196,6 +214,17 @@
		interrupts = <0 125 0>;
		interrupt-names = "core_irq";

		qcom,bus-width = <4>;
		status = "disabled";
	};

	sdhc_2: sdhci@f98a4900 {
		compatible = "qcom,sdhci-msm";
		reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
		reg-names = "hc_mem", "core_mem";

		interrupts = <0 125 0>, <0 221 0>;
		interrupt-names = "hc_irq", "pwr_irq";

		qcom,bus-width = <4>;
		status = "disabled";