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Commit 57e834e2 authored by Alan Cox's avatar Alan Cox Committed by Linus Torvalds
Browse files

[PATCH] ide: clean up pdc202xx_old so its more readable (done so I could work on libata ports) 



Also sets the new fifo flag so that we don't hang on some errors with this
chipset.

Signed-off-by: default avatarAlan Cox <alan@redhat.com>
Cc: Bartlomiej Zolnierkiewicz <B.Zolnierkiewicz@elka.pw.edu.pl>
Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent f201f504

drivers/ide/pci/pdc202xx_old.c

+5 −110
Original line number Diff line number Diff line
@@ -101,31 +101,6 @@ static const char *pdc_quirk_drives[] = { 
#define	MC1		0x02	/* DMA"C" timing */

#define	MC0		0x01	/* DMA"C" timing */



#if 0

	unsigned long bibma  = pci_resource_start(dev, 4);

	u8 hi = 0, lo = 0;



	u8 sc1c	= inb_p((u16)bibma + 0x1c); 

	u8 sc1e	= inb_p((u16)bibma + 0x1e);

	u8 sc1f	= inb_p((u16)bibma + 0x1f);



	p += sprintf(p, "Host Mode                            : %s\n",

		(sc1f & 0x08) ? "Tri-Stated" : "Normal");

	p += sprintf(p, "Bus Clocking                         : %s\n",

		((sc1f & 0xC0) == 0xC0) ? "100 External" :

		((sc1f & 0x80) == 0x80) ? "66 External" :

		((sc1f & 0x40) == 0x40) ? "33 External" : "33 PCI Internal");

	p += sprintf(p, "IO pad select                        : %s mA\n",

		((sc1c & 0x03) == 0x03) ? "10" :

		((sc1c & 0x02) == 0x02) ? "8" :

		((sc1c & 0x01) == 0x01) ? "6" :

		((sc1c & 0x00) == 0x00) ? "4" : "??");

	hi = sc1e >> 4;

	lo = sc1e & 0xf;

	p += sprintf(p, "Status Polling Period                : %d\n", hi);

	p += sprintf(p, "Interrupt Check Status Polling Delay : %d\n", lo);

#endif



static u8 pdc202xx_ratemask (ide_drive_t *drive)

{

	u8 mode;
@@ -505,42 +480,13 @@ static void pdc202xx_reset (ide_drive_t *drive) 
	

	pdc202xx_reset_host(hwif);

	pdc202xx_reset_host(mate);

#if 0

	/*

	 * FIXME: Have to kick all the drives again :-/

	 * What a pain in the ACE!

	 */

	if (hwif->present) {

		u16 hunit = 0;

		for (hunit = 0; hunit < MAX_DRIVES; ++hunit) {

			ide_drive_t *hdrive = &hwif->drives[hunit];

			if (hdrive->present) {

				if (hwif->ide_dma_check)

					hwif->ide_dma_check(hdrive);

				else

					hwif->tuneproc(hdrive, 5);

			}

		}

	}

	if (mate->present) {

		u16 munit = 0;

		for (munit = 0; munit < MAX_DRIVES; ++munit) {

			ide_drive_t *mdrive = &mate->drives[munit];

			if (mdrive->present) {

				if (mate->ide_dma_check) 

					mate->ide_dma_check(mdrive);

				else

					mate->tuneproc(mdrive, 5);

			}

		}

	}

#else

	hwif->tuneproc(drive, 5);

#endif

}



static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev, const char *name)

static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev,

							const char *name)

{

	/* This doesn't appear needed */

	if (dev->resource[PCI_ROM_RESOURCE].start) {

		pci_write_config_dword(dev, PCI_ROM_ADDRESS,

			dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
@@ -548,30 +494,6 @@ static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev, const c 
			name, dev->resource[PCI_ROM_RESOURCE].start);

	}



	/*

	 * software reset -  this is required because the bios

	 * will set UDMA timing on if the hdd supports it. The

	 * user may want to turn udma off. A bug in the pdc20262

	 * is that it cannot handle a downgrade in timing from

	 * UDMA to DMA. Disk accesses after issuing a set

	 * feature command will result in errors. A software

	 * reset leaves the timing registers intact,

	 * but resets the drives.

	 */

#if 0

	if ((dev->device == PCI_DEVICE_ID_PROMISE_20267) ||

	    (dev->device == PCI_DEVICE_ID_PROMISE_20265) ||

	    (dev->device == PCI_DEVICE_ID_PROMISE_20263) ||

	    (dev->device == PCI_DEVICE_ID_PROMISE_20262)) {

		unsigned long high_16	= pci_resource_start(dev, 4);

		byte udma_speed_flag	= inb(high_16 + 0x001f);

		outb(udma_speed_flag | 0x10, high_16 + 0x001f);

		mdelay(100);

		outb(udma_speed_flag & ~0x10, high_16 + 0x001f);

		mdelay(2000);	/* 2 seconds ?! */

	}



#endif

	return dev->irq;

}
@@ -599,6 +521,8 @@ static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif) 
	hwif->mwdma_mask = 0x07;

	hwif->swdma_mask = 0x07;



	hwif->err_stops_fifo = 1;



	hwif->ide_dma_check = &pdc202xx_config_drive_xfer_rate;

	hwif->ide_dma_lostirq = &pdc202xx_ide_dma_lostirq;

	hwif->ide_dma_timeout = &pdc202xx_ide_dma_timeout;
@@ -687,19 +611,6 @@ static int __devinit init_setup_pdc202ata4(struct pci_dev *dev, 
				"mirror fixed.\n", d->name);

		}

	}



#if 0

        if (dev->device == PCI_DEVICE_ID_PROMISE_20262)

        if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||

             (tmp & e->mask) != e->val))



        if (d->enablebits[0].reg != d->enablebits[1].reg) {

                d->enablebits[0].reg    = d->enablebits[1].reg;

                d->enablebits[0].mask   = d->enablebits[1].mask;

                d->enablebits[0].val    = d->enablebits[1].val;

        }

#endif



	return ide_setup_pci_device(dev, d);

}
@@ -714,22 +625,6 @@ static int __devinit init_setup_pdc20265(struct pci_dev *dev, 
			"attached to I2O RAID controller.\n");

		return -ENODEV;

	}



#if 0

        {

                u8 pri = 0, sec = 0;



        if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||

             (tmp & e->mask) != e->val))



        if (d->enablebits[0].reg != d->enablebits[1].reg) {

                d->enablebits[0].reg    = d->enablebits[1].reg;

                d->enablebits[0].mask   = d->enablebits[1].mask;

                d->enablebits[0].val    = d->enablebits[1].val;

        }

        }

#endif



	return ide_setup_pci_device(dev, d);

}