Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 51d9e49d authored by Jordan Crouse's avatar Jordan Crouse
Browse files

msm: kgsl: Protect SMMU registers from being written by the GPU 



Put the SMMU register range in protected mode to shield them from
IB1/IB2 writes from userspace.

CRs-Fixed: 599971
Change-Id: Ic0dedbad8c03fc1c54ff73221231e2440d3c34dd
Signed-off-by: default avatarJordan Crouse <jcrouse@codeaurora.org>
parent 235cd46b

drivers/gpu/msm/adreno.h

+1 −1
Original line number Diff line number Diff line
@@ -995,7 +995,7 @@ static inline void adreno_set_protected_registers(struct kgsl_device *device, 
	/* There are only 16 registers available */

	BUG_ON(*index >= 16);



	val = 0x60000000 | ((mask_len & 0x1F) << 24) | ((reg << 2) & 0xFFFF);

	val = 0x60000000 | ((mask_len & 0x1F) << 24) | ((reg << 2) & 0x1FFFF);



	/*

	 * Write the protection range to the next available protection

drivers/gpu/msm/adreno_a3xx.c

+3 −0
Original line number Diff line number Diff line
@@ -2030,6 +2030,9 @@ static void a3xx_protect_init(struct kgsl_device *device) 


	/* VBIF registers */

	adreno_set_protected_registers(device, &index, 0x3000, 6);



	/* SMMU registers */

	adreno_set_protected_registers(device, &index, 0x4000, 14);

}



static void a3xx_start(struct adreno_device *adreno_dev)