Loading Documentation/devicetree/bindings/usb/msm-ssusb.txt +22 −22 Original line number Diff line number Diff line MSM SuperSpeed USB3.0 SoC controller Required properties : - compatible : should be "qcom,dwc-usb3-msm" - compatible : should be "qti,dwc-usb3-msm" - reg : offset and length of the register set in the memory map offset and length of the TCSR register for routing USB signals to either picoPHY0 or picoPHY1. Loading @@ -9,7 +9,7 @@ Required properties : - <supply-name>-supply: phandle to the regulator device tree node Required "supply-name" examples are: "vbus_dwc3" : vbus supply for host mode - qcom,dwc-usb3-msm-dbm-eps: Number of endpoints avaliable for - qti,dwc-usb3-msm-dbm-eps: Number of endpoints avaliable for the DBM (Device Bus Manager). The DBM is HW unit which is part of the MSM USB3.0 core (which also includes the Synopsys DesignWare USB3.0 controller) Loading @@ -17,30 +17,30 @@ Required properties : Optional properties : - Refer to "Documentation/devicetree/bindings/arm/msm/msm_bus.txt" for below optional properties: - qcom,msm_bus,name - qcom,msm_bus,num_cases - qcom,msm_bus,num_paths - qcom,msm_bus,vectors - qti,msm_bus,name - qti,msm_bus,num_cases - qti,msm_bus,num_paths - qti,msm_bus,vectors - interrupt-names : Optional interrupt resource entries are: "hs_phy_irq" : Interrupt from HSPHY for asynchronous events in LPM. This is not used if wakeup events are received externally (e.g. PMIC) "pmic_id_irq" : Interrupt from PMIC for external ID pin notification. - qcom,otg-capability: If present then depend on PMIC for VBUS notifications, - qti,otg-capability: If present then depend on PMIC for VBUS notifications, otherwise depend on PHY. - qcom,charging-disabled: If present then battery charging using USB - qti,charging-disabled: If present then battery charging using USB is disabled. - qcom,skip-charger-detection: If present then charger detection using BC1.2 - qti,skip-charger-detection: If present then charger detection using BC1.2 is not supported and attached host should always be assumed as SDP. - USB3_GDSC-supply : phandle to the globally distributed switch controller regulator node to the USB controller. - qcom,dwc_usb3-adc_tm: Corresponding ADC_TM device's phandle to set recurring - qti,dwc_usb3-adc_tm: Corresponding ADC_TM device's phandle to set recurring measurements on USB_ID channel when using ADC and receive notifications for set thresholds. - qcom,dwc-usb3-msm-tx-fifo-size: If present, represents RAM size available for - qti,dwc-usb3-msm-tx-fifo-size: If present, represents RAM size available for TX fifo allocation in bytes - qcom,dwc-usb3-msm-qdss-tx-fifo-size: If present, represent RAM size available - qti,dwc-usb3-msm-qdss-tx-fifo-size: If present, represent RAM size available for TX fifo allocation in QDSS composition - qcom,restore-sec-cfg-for-scm-dev-id: If present then device id value is - qti,restore-sec-cfg-for-scm-dev-id: If present then device id value is passed to secure channel manager(scm) driver. scm driver uses this device id to restore USB controller related security configuration after coming out of the controller power collapse. Loading @@ -54,22 +54,22 @@ Sub nodes: Example MSM USB3.0 controller device node : usb@f9200000 { compatible = "qcom,dwc-usb3-msm"; compatible = "qti,dwc-usb3-msm"; reg = <0xf9200000 0xfc000>, <0xfd4ab000 0x4>; interrupts = <0 133 0>; interrupt-names = "hs_phy_irq"; vbus_dwc3-supply = <&pm8941_mvs1>; USB3_GDSC-supply = <&gdsc_usb30>; qcom,dwc-usb3-msm-dbm-eps = <4> qcom,dwc_usb3-adc_tm = <&pm8941_adc_tm>; qcom,dwc-usb3-msm-tx-fifo-size = <29696>; qcom,dwc-usb3-msm-qdss-tx-fifo-size = <16384>; qti,dwc-usb3-msm-dbm-eps = <4> qti,dwc_usb3-adc_tm = <&pm8941_adc_tm>; qti,dwc-usb3-msm-tx-fifo-size = <29696>; qti,dwc-usb3-msm-qdss-tx-fifo-size = <16384>; qcom,msm_bus,name = "usb3"; qcom,msm_bus,num_cases = <2>; qcom,msm_bus,num_paths = <1>; qcom,msm_bus,vectors = qti,msm_bus,name = "usb3"; qti,msm_bus,num_cases = <2>; qti,msm_bus,num_paths = <1>; qti,msm_bus,vectors = <61 512 0 0>, <61 512 240000000 960000000>; dwc3@f9200000 { Loading arch/arm/boot/dts/qti/apq8074-dragonboard.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -296,7 +296,7 @@ &usb3 { interrupts = <0>; /* remove pmic_id_irq; used by &usb_otg */ qcom,charging-disabled; qti,charging-disabled; vbus_dwc3-supply = <0>; dwc3@f9200000 { host-only-mode; Loading arch/arm/boot/dts/qti/apq8074-v2.0-1-cdp.dts +1 −1 Original line number Diff line number Diff line Loading @@ -30,5 +30,5 @@ 0x0 1 &spmi_bus 0x0 0x0 0x9 0x0>; interrupt-names = "hs_phy_irq", "pmic_id_irq"; qcom,misc-ref = <&pm8941_misc>; qti,misc-ref = <&pm8941_misc>; }; arch/arm/boot/dts/qti/apq8074-v2.2-cdp.dts +1 −1 Original line number Diff line number Diff line Loading @@ -30,5 +30,5 @@ 0x0 1 &spmi_bus 0x0 0x0 0x9 0x0>; interrupt-names = "hs_phy_irq", "pmic_id_irq"; qcom,misc-ref = <&pm8941_misc>; qti,misc-ref = <&pm8941_misc>; }; arch/arm/boot/dts/qti/apq8084-liquid.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -319,7 +319,7 @@ }; &usb3 { qcom,charging-disabled; qti,charging-disabled; }; &usb3_sec { Loading Loading
Documentation/devicetree/bindings/usb/msm-ssusb.txt +22 −22 Original line number Diff line number Diff line MSM SuperSpeed USB3.0 SoC controller Required properties : - compatible : should be "qcom,dwc-usb3-msm" - compatible : should be "qti,dwc-usb3-msm" - reg : offset and length of the register set in the memory map offset and length of the TCSR register for routing USB signals to either picoPHY0 or picoPHY1. Loading @@ -9,7 +9,7 @@ Required properties : - <supply-name>-supply: phandle to the regulator device tree node Required "supply-name" examples are: "vbus_dwc3" : vbus supply for host mode - qcom,dwc-usb3-msm-dbm-eps: Number of endpoints avaliable for - qti,dwc-usb3-msm-dbm-eps: Number of endpoints avaliable for the DBM (Device Bus Manager). The DBM is HW unit which is part of the MSM USB3.0 core (which also includes the Synopsys DesignWare USB3.0 controller) Loading @@ -17,30 +17,30 @@ Required properties : Optional properties : - Refer to "Documentation/devicetree/bindings/arm/msm/msm_bus.txt" for below optional properties: - qcom,msm_bus,name - qcom,msm_bus,num_cases - qcom,msm_bus,num_paths - qcom,msm_bus,vectors - qti,msm_bus,name - qti,msm_bus,num_cases - qti,msm_bus,num_paths - qti,msm_bus,vectors - interrupt-names : Optional interrupt resource entries are: "hs_phy_irq" : Interrupt from HSPHY for asynchronous events in LPM. This is not used if wakeup events are received externally (e.g. PMIC) "pmic_id_irq" : Interrupt from PMIC for external ID pin notification. - qcom,otg-capability: If present then depend on PMIC for VBUS notifications, - qti,otg-capability: If present then depend on PMIC for VBUS notifications, otherwise depend on PHY. - qcom,charging-disabled: If present then battery charging using USB - qti,charging-disabled: If present then battery charging using USB is disabled. - qcom,skip-charger-detection: If present then charger detection using BC1.2 - qti,skip-charger-detection: If present then charger detection using BC1.2 is not supported and attached host should always be assumed as SDP. - USB3_GDSC-supply : phandle to the globally distributed switch controller regulator node to the USB controller. - qcom,dwc_usb3-adc_tm: Corresponding ADC_TM device's phandle to set recurring - qti,dwc_usb3-adc_tm: Corresponding ADC_TM device's phandle to set recurring measurements on USB_ID channel when using ADC and receive notifications for set thresholds. - qcom,dwc-usb3-msm-tx-fifo-size: If present, represents RAM size available for - qti,dwc-usb3-msm-tx-fifo-size: If present, represents RAM size available for TX fifo allocation in bytes - qcom,dwc-usb3-msm-qdss-tx-fifo-size: If present, represent RAM size available - qti,dwc-usb3-msm-qdss-tx-fifo-size: If present, represent RAM size available for TX fifo allocation in QDSS composition - qcom,restore-sec-cfg-for-scm-dev-id: If present then device id value is - qti,restore-sec-cfg-for-scm-dev-id: If present then device id value is passed to secure channel manager(scm) driver. scm driver uses this device id to restore USB controller related security configuration after coming out of the controller power collapse. Loading @@ -54,22 +54,22 @@ Sub nodes: Example MSM USB3.0 controller device node : usb@f9200000 { compatible = "qcom,dwc-usb3-msm"; compatible = "qti,dwc-usb3-msm"; reg = <0xf9200000 0xfc000>, <0xfd4ab000 0x4>; interrupts = <0 133 0>; interrupt-names = "hs_phy_irq"; vbus_dwc3-supply = <&pm8941_mvs1>; USB3_GDSC-supply = <&gdsc_usb30>; qcom,dwc-usb3-msm-dbm-eps = <4> qcom,dwc_usb3-adc_tm = <&pm8941_adc_tm>; qcom,dwc-usb3-msm-tx-fifo-size = <29696>; qcom,dwc-usb3-msm-qdss-tx-fifo-size = <16384>; qti,dwc-usb3-msm-dbm-eps = <4> qti,dwc_usb3-adc_tm = <&pm8941_adc_tm>; qti,dwc-usb3-msm-tx-fifo-size = <29696>; qti,dwc-usb3-msm-qdss-tx-fifo-size = <16384>; qcom,msm_bus,name = "usb3"; qcom,msm_bus,num_cases = <2>; qcom,msm_bus,num_paths = <1>; qcom,msm_bus,vectors = qti,msm_bus,name = "usb3"; qti,msm_bus,num_cases = <2>; qti,msm_bus,num_paths = <1>; qti,msm_bus,vectors = <61 512 0 0>, <61 512 240000000 960000000>; dwc3@f9200000 { Loading
arch/arm/boot/dts/qti/apq8074-dragonboard.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -296,7 +296,7 @@ &usb3 { interrupts = <0>; /* remove pmic_id_irq; used by &usb_otg */ qcom,charging-disabled; qti,charging-disabled; vbus_dwc3-supply = <0>; dwc3@f9200000 { host-only-mode; Loading
arch/arm/boot/dts/qti/apq8074-v2.0-1-cdp.dts +1 −1 Original line number Diff line number Diff line Loading @@ -30,5 +30,5 @@ 0x0 1 &spmi_bus 0x0 0x0 0x9 0x0>; interrupt-names = "hs_phy_irq", "pmic_id_irq"; qcom,misc-ref = <&pm8941_misc>; qti,misc-ref = <&pm8941_misc>; };
arch/arm/boot/dts/qti/apq8074-v2.2-cdp.dts +1 −1 Original line number Diff line number Diff line Loading @@ -30,5 +30,5 @@ 0x0 1 &spmi_bus 0x0 0x0 0x9 0x0>; interrupt-names = "hs_phy_irq", "pmic_id_irq"; qcom,misc-ref = <&pm8941_misc>; qti,misc-ref = <&pm8941_misc>; };
arch/arm/boot/dts/qti/apq8084-liquid.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -319,7 +319,7 @@ }; &usb3 { qcom,charging-disabled; qti,charging-disabled; }; &usb3_sec { Loading