Loading arch/arm/mach-msm/clock-8084.c +10 −0 Original line number Diff line number Diff line Loading @@ -6188,6 +6188,16 @@ static struct clk_lookup apq_clocks_8084[] = { "fdce0000.qcom,venus"), CLK_LOOKUP("core_clk", venus0_vcodec0_clk.c, "fdce0000.qcom,venus"), CLK_LOOKUP("iface_clk", venus0_ahb_clk.c, "fdc00000.qcom,vidc"), CLK_LOOKUP("bus_clk", venus0_axi_clk.c, "fdc00000.qcom,vidc"), CLK_LOOKUP("mem_clk", venus0_ocmemnoc_clk.c, "fdc00000.qcom,vidc"), CLK_LOOKUP("core_clk", venus0_vcodec0_clk.c, "fdc00000.qcom,vidc"), CLK_LOOKUP("core0_clk", venus0_core0_vcodec_clk.c, "fdc00000.qcom,vidc"), CLK_LOOKUP("core1_clk", venus0_core1_vcodec_clk.c, "fdc00000.qcom,vidc"), CLK_LOOKUP("iface_clk", vpu_ahb_clk.c, "fde0b000.qcom,vpu"), CLK_LOOKUP("bus_clk", vpu_axi_clk.c, "fde0b000.qcom,vpu"), Loading Loading
arch/arm/mach-msm/clock-8084.c +10 −0 Original line number Diff line number Diff line Loading @@ -6188,6 +6188,16 @@ static struct clk_lookup apq_clocks_8084[] = { "fdce0000.qcom,venus"), CLK_LOOKUP("core_clk", venus0_vcodec0_clk.c, "fdce0000.qcom,venus"), CLK_LOOKUP("iface_clk", venus0_ahb_clk.c, "fdc00000.qcom,vidc"), CLK_LOOKUP("bus_clk", venus0_axi_clk.c, "fdc00000.qcom,vidc"), CLK_LOOKUP("mem_clk", venus0_ocmemnoc_clk.c, "fdc00000.qcom,vidc"), CLK_LOOKUP("core_clk", venus0_vcodec0_clk.c, "fdc00000.qcom,vidc"), CLK_LOOKUP("core0_clk", venus0_core0_vcodec_clk.c, "fdc00000.qcom,vidc"), CLK_LOOKUP("core1_clk", venus0_core1_vcodec_clk.c, "fdc00000.qcom,vidc"), CLK_LOOKUP("iface_clk", vpu_ahb_clk.c, "fde0b000.qcom,vpu"), CLK_LOOKUP("bus_clk", vpu_axi_clk.c, "fde0b000.qcom,vpu"), Loading