Loading drivers/gpu/msm/adreno-gpulist.h +22 −0 Original line number Diff line number Diff line Loading @@ -206,4 +206,26 @@ static const struct adreno_gpu_core adreno_gpulist[] = { .shader_offset = 0x20000, .shader_size = 0x10000, }, { .gpurev = ADRENO_REV_A418, .core = 4, .major = 1, .minor = 8, .patchid = ANY_ID, .features = ADRENO_USES_OCMEM | ADRENO_WARM_START | ADRENO_USE_BOOTSTRAP | ADRENO_SPTP_PC | ADRENO_PPD, .pm4fw_name = "a420_pm4.fw", .pfpfw_name = "a420_pfp.fw", .gpudev = &adreno_a4xx_gpudev, .gmem_size = (SZ_512K), .pm4_jt_idx = 0x901, .pm4_jt_addr = 0x300, .pfp_jt_idx = 0x401, .pfp_jt_addr = 0x400, .pm4_bstrp_size = 0x06, .pfp_bstrp_size = 0x28, .pfp_bstrp_ver = 0x4ff083, .shader_offset = 0x20000, /* SP and TP addresses */ .shader_size = 0x10000, }, }; drivers/gpu/msm/adreno.h +6 −0 Original line number Diff line number Diff line Loading @@ -139,6 +139,7 @@ enum adreno_gpurev { ADRENO_REV_A330 = 330, ADRENO_REV_A305B = 335, ADRENO_REV_A405 = 405, ADRENO_REV_A418 = 418, ADRENO_REV_A420 = 420, ADRENO_REV_A430 = 430, }; Loading Loading @@ -851,6 +852,11 @@ static inline int adreno_is_a430(struct adreno_device *adreno_dev) return (ADRENO_GPUREV(adreno_dev) == ADRENO_REV_A430); } static inline int adreno_is_a418(struct adreno_device *adreno_dev) { return (ADRENO_GPUREV(adreno_dev) == ADRENO_REV_A418); } static inline int adreno_rb_ctxtswitch(unsigned int *cmd) { return (cmd[0] == cp_nop_packet(1) && Loading drivers/gpu/msm/adreno_a4xx.c +3 −0 Original line number Diff line number Diff line Loading @@ -180,6 +180,8 @@ const struct adreno_vbif_snapshot_registers a4xx_vbif_snapshot_registers[] = { ARRAY_SIZE(a4xx_vbif_ver_20020000_registers)/2}, { 0x20050000, a4xx_vbif_ver_20050000_registers, ARRAY_SIZE(a4xx_vbif_ver_20050000_registers)/2}, { 0x20070000, a4xx_vbif_ver_20020000_registers, ARRAY_SIZE(a4xx_vbif_ver_20020000_registers)/2}, }; const unsigned int a4xx_vbif_snapshot_reg_cnt = Loading Loading @@ -333,6 +335,7 @@ static const struct adreno_vbif_platform a4xx_vbif_platforms[] = { { adreno_is_a405, a405_vbif }, { adreno_is_a420, a420_vbif }, { adreno_is_a430, a430_vbif }, { adreno_is_a418, a430_vbif }, }; /* Loading drivers/gpu/msm/adreno_a4xx_snapshot.c +1 −1 Original line number Diff line number Diff line Loading @@ -402,7 +402,7 @@ void a4xx_snapshot(struct adreno_device *adreno_dev, _snapshot_a3xx_regs(regs, &list, a4xx_sp_tp_registers, a4xx_sp_tp_registers_count, 0); if (!adreno_is_a405(adreno_dev) && !adreno_is_a430(adreno_dev)) { if (adreno_is_a420(adreno_dev)) { _snapshot_a3xx_regs(regs, &list, a4xx_xpu_registers, a4xx_xpu_reg_cnt, 1); } Loading Loading
drivers/gpu/msm/adreno-gpulist.h +22 −0 Original line number Diff line number Diff line Loading @@ -206,4 +206,26 @@ static const struct adreno_gpu_core adreno_gpulist[] = { .shader_offset = 0x20000, .shader_size = 0x10000, }, { .gpurev = ADRENO_REV_A418, .core = 4, .major = 1, .minor = 8, .patchid = ANY_ID, .features = ADRENO_USES_OCMEM | ADRENO_WARM_START | ADRENO_USE_BOOTSTRAP | ADRENO_SPTP_PC | ADRENO_PPD, .pm4fw_name = "a420_pm4.fw", .pfpfw_name = "a420_pfp.fw", .gpudev = &adreno_a4xx_gpudev, .gmem_size = (SZ_512K), .pm4_jt_idx = 0x901, .pm4_jt_addr = 0x300, .pfp_jt_idx = 0x401, .pfp_jt_addr = 0x400, .pm4_bstrp_size = 0x06, .pfp_bstrp_size = 0x28, .pfp_bstrp_ver = 0x4ff083, .shader_offset = 0x20000, /* SP and TP addresses */ .shader_size = 0x10000, }, };
drivers/gpu/msm/adreno.h +6 −0 Original line number Diff line number Diff line Loading @@ -139,6 +139,7 @@ enum adreno_gpurev { ADRENO_REV_A330 = 330, ADRENO_REV_A305B = 335, ADRENO_REV_A405 = 405, ADRENO_REV_A418 = 418, ADRENO_REV_A420 = 420, ADRENO_REV_A430 = 430, }; Loading Loading @@ -851,6 +852,11 @@ static inline int adreno_is_a430(struct adreno_device *adreno_dev) return (ADRENO_GPUREV(adreno_dev) == ADRENO_REV_A430); } static inline int adreno_is_a418(struct adreno_device *adreno_dev) { return (ADRENO_GPUREV(adreno_dev) == ADRENO_REV_A418); } static inline int adreno_rb_ctxtswitch(unsigned int *cmd) { return (cmd[0] == cp_nop_packet(1) && Loading
drivers/gpu/msm/adreno_a4xx.c +3 −0 Original line number Diff line number Diff line Loading @@ -180,6 +180,8 @@ const struct adreno_vbif_snapshot_registers a4xx_vbif_snapshot_registers[] = { ARRAY_SIZE(a4xx_vbif_ver_20020000_registers)/2}, { 0x20050000, a4xx_vbif_ver_20050000_registers, ARRAY_SIZE(a4xx_vbif_ver_20050000_registers)/2}, { 0x20070000, a4xx_vbif_ver_20020000_registers, ARRAY_SIZE(a4xx_vbif_ver_20020000_registers)/2}, }; const unsigned int a4xx_vbif_snapshot_reg_cnt = Loading Loading @@ -333,6 +335,7 @@ static const struct adreno_vbif_platform a4xx_vbif_platforms[] = { { adreno_is_a405, a405_vbif }, { adreno_is_a420, a420_vbif }, { adreno_is_a430, a430_vbif }, { adreno_is_a418, a430_vbif }, }; /* Loading
drivers/gpu/msm/adreno_a4xx_snapshot.c +1 −1 Original line number Diff line number Diff line Loading @@ -402,7 +402,7 @@ void a4xx_snapshot(struct adreno_device *adreno_dev, _snapshot_a3xx_regs(regs, &list, a4xx_sp_tp_registers, a4xx_sp_tp_registers_count, 0); if (!adreno_is_a405(adreno_dev) && !adreno_is_a430(adreno_dev)) { if (adreno_is_a420(adreno_dev)) { _snapshot_a3xx_regs(regs, &list, a4xx_xpu_registers, a4xx_xpu_reg_cnt, 1); } Loading