Merge "crypto: msm: Remove lock/unlock APIs used in shared CE HW scenario" (33b7b4e5) · Commits · e / devices / samsung / android_kernel_samsung_msm8916

drivers/crypto/msm/compat_qcedev.c

+0 −8

Original line number	Original line	Diff line number	Diff line
	@@ -366,10 +366,6 @@ static unsigned int convert_cmd(unsigned int cmd)
	return QCEDEV_IOCTL_SHA_FINAL_REQ;		return QCEDEV_IOCTL_SHA_FINAL_REQ;
	case COMPAT_QCEDEV_IOCTL_GET_SHA_REQ:		case COMPAT_QCEDEV_IOCTL_GET_SHA_REQ:
	return QCEDEV_IOCTL_GET_SHA_REQ;		return QCEDEV_IOCTL_GET_SHA_REQ;
	case COMPAT_QCEDEV_IOCTL_LOCK_CE:
	return QCEDEV_IOCTL_LOCK_CE;
	case COMPAT_QCEDEV_IOCTL_UNLOCK_CE:
	return QCEDEV_IOCTL_UNLOCK_CE;
	case COMPAT_QCEDEV_IOCTL_GET_CMAC_REQ:		case COMPAT_QCEDEV_IOCTL_GET_CMAC_REQ:
	return QCEDEV_IOCTL_GET_CMAC_REQ;		return QCEDEV_IOCTL_GET_CMAC_REQ;
	default:		default:
	@@ -384,10 +380,6 @@ long compat_qcedev_ioctl(struct file *file,
	long ret;		long ret;

	switch (cmd) {		switch (cmd) {
	case COMPAT_QCEDEV_IOCTL_LOCK_CE:
	case COMPAT_QCEDEV_IOCTL_UNLOCK_CE: {
	return qcedev_ioctl(file, convert_cmd(cmd), 0);
	}
	case COMPAT_QCEDEV_IOCTL_ENC_REQ:		case COMPAT_QCEDEV_IOCTL_ENC_REQ:
	case COMPAT_QCEDEV_IOCTL_DEC_REQ: {		case COMPAT_QCEDEV_IOCTL_DEC_REQ: {
	struct compat_qcedev_cipher_op_req __user *data32;		struct compat_qcedev_cipher_op_req __user *data32;

drivers/crypto/msm/qcedev.c

+0 −111

Original line number	Original line	Diff line number	Diff line
	@@ -31,7 +31,6 @@
	#include <linux/msm-bus.h>		#include <linux/msm-bus.h>
	#include <linux/qcedev.h>		#include <linux/qcedev.h>

	#include <soc/qcom/scm.h>
	#include <crypto/hash.h>		#include <crypto/hash.h>
	#include "qcedevi.h"		#include "qcedevi.h"
	#include "qce.h"		#include "qce.h"
	@@ -62,34 +61,6 @@ static uint8_t _std_init_vector_sha256_uint8[] = {

	static DEFINE_MUTEX(send_cmd_lock);		static DEFINE_MUTEX(send_cmd_lock);
	static DEFINE_MUTEX(qcedev_sent_bw_req);		static DEFINE_MUTEX(qcedev_sent_bw_req);
	/*-------------------------------------------------------------------------
	* Resource Locking Service
	* ------------------------------------------------------------------------*/
	#define QCEDEV_CMD_ID 1
	#define QCEDEV_CE_LOCK_CMD 1
	#define QCEDEV_CE_UNLOCK_CMD 0
	#define NUM_RETRY 1000
	#define CE_BUSY 55

	static int qcedev_scm_cmd(int resource, int cmd, int *response)
	{
	#ifdef CONFIG_MSM_SCM

	struct {
	int resource;
	int cmd;
	} cmd_buf;

	cmd_buf.resource = resource;
	cmd_buf.cmd = cmd;

	return scm_call(SCM_SVC_TZ, QCEDEV_CMD_ID, &cmd_buf,
	sizeof(cmd_buf), response, sizeof(*response));

	#else
	return 0;
	#endif
	}

	static void qcedev_ce_high_bw_req(struct qcedev_control *podev,		static void qcedev_ce_high_bw_req(struct qcedev_control *podev,
	bool high_bw_req)		bool high_bw_req)
	@@ -143,66 +114,6 @@ static void qcedev_ce_high_bw_req(struct qcedev_control *podev,
	mutex_unlock(&qcedev_sent_bw_req);		mutex_unlock(&qcedev_sent_bw_req);
	}		}


	static int qcedev_unlock_ce(struct qcedev_control *podev)
	{
	int ret = 0;

	mutex_lock(&send_cmd_lock);
	if (podev->ce_lock_count == 1) {
	int response = 0;

	if (qcedev_scm_cmd(podev->platform_support.shared_ce_resource,
	QCEDEV_CE_UNLOCK_CMD, &response)) {
	pr_err("Failed to release CE lock\n");
	ret = -EIO;
	}
	}
	if (ret == 0) {
	if (podev->ce_lock_count)
	podev->ce_lock_count--;
	else {
	/* We should never be here */
	ret = -EIO;
	pr_err("CE hardware is already unlocked\n");
	}
	}
	mutex_unlock(&send_cmd_lock);

	return ret;
	}

	static int qcedev_lock_ce(struct qcedev_control *podev)
	{
	int ret = 0;

	mutex_lock(&send_cmd_lock);
	if (podev->ce_lock_count == 0) {
	int response = -CE_BUSY;
	int i = 0;

	do {
	if (qcedev_scm_cmd(
	podev->platform_support.shared_ce_resource,
	QCEDEV_CE_LOCK_CMD, &response)) {
	response = -EINVAL;
	break;
	}
	} while ((response == -CE_BUSY) && (i++ < NUM_RETRY));

	if ((response == -CE_BUSY) && (i >= NUM_RETRY)) {
	ret = -EUSERS;
	} else {
	if (response < 0)
	ret = -EINVAL;
	}
	}
	if (ret == 0)
	podev->ce_lock_count++;
	mutex_unlock(&send_cmd_lock);
	return ret;
	}

	#define QCEDEV_MAGIC 0x56434544 /* "qced" */		#define QCEDEV_MAGIC 0x56434544 /* "qced" */

	static int qcedev_open(struct inode inode, struct file file);		static int qcedev_open(struct inode inode, struct file file);
	@@ -589,12 +500,6 @@ static int submit_req(struct qcedev_async_req *qcedev_areq,
	qcedev_areq->err = 0;		qcedev_areq->err = 0;
	podev = handle->cntl;		podev = handle->cntl;

	if (podev->platform_support.ce_shared) {
	ret = qcedev_lock_ce(podev);
	if (ret)
	return ret;
	}

	spin_lock_irqsave(&podev->lock, flags);		spin_lock_irqsave(&podev->lock, flags);

	if (podev->active_command == NULL) {		if (podev->active_command == NULL) {
	@@ -615,9 +520,6 @@ static int submit_req(struct qcedev_async_req *qcedev_areq,
	if (ret == 0)		if (ret == 0)
	wait_for_completion(&qcedev_areq->complete);		wait_for_completion(&qcedev_areq->complete);

	if (podev->platform_support.ce_shared)
	ret = qcedev_unlock_ce(podev);

	if (ret)		if (ret)
	qcedev_areq->err = -EIO;		qcedev_areq->err = -EIO;

	@@ -1777,18 +1679,6 @@ long qcedev_ioctl(struct file *file, unsigned cmd, unsigned long arg)
	pstat = &_qcedev_stat;		pstat = &_qcedev_stat;

	switch (cmd) {		switch (cmd) {
	case QCEDEV_IOCTL_LOCK_CE:
	if (podev->platform_support.ce_shared)
	err = qcedev_lock_ce(podev);
	else
	err = -ENOTTY;
	break;
	case QCEDEV_IOCTL_UNLOCK_CE:
	if (podev->platform_support.ce_shared)
	err = qcedev_unlock_ce(podev);
	else
	err = -ENOTTY;
	break;
	case QCEDEV_IOCTL_ENC_REQ:		case QCEDEV_IOCTL_ENC_REQ:
	case QCEDEV_IOCTL_DEC_REQ:		case QCEDEV_IOCTL_DEC_REQ:
	if (!access_ok(VERIFY_WRITE, (void __user *)arg,		if (!access_ok(VERIFY_WRITE, (void __user *)arg,
	@@ -2008,7 +1898,6 @@ static int qcedev_probe(struct platform_device *pdev)

	podev = &qce_dev[0];		podev = &qce_dev[0];

	podev->ce_lock_count = 0;
	podev->high_bw_req_count = 0;		podev->high_bw_req_count = 0;
	INIT_LIST_HEAD(&podev->ready_commands);		INIT_LIST_HEAD(&podev->ready_commands);
	podev->active_command = NULL;		podev->active_command = NULL;

drivers/crypto/msm/qcrypto.c

+0 −88

Original line number	Original line	Diff line number	Diff line
	@@ -31,7 +31,6 @@
	#include <linux/platform_data/qcom_crypto_device.h>		#include <linux/platform_data/qcom_crypto_device.h>
	#include <linux/msm-bus.h>		#include <linux/msm-bus.h>
	#include <linux/qcrypto.h>		#include <linux/qcrypto.h>
	#include <soc/qcom/scm.h>

	#include <crypto/ctr.h>		#include <crypto/ctr.h>
	#include <crypto/des.h>		#include <crypto/des.h>
	@@ -162,7 +161,6 @@ struct crypto_priv {
	/* current active request */		/* current active request */
	struct crypto_async_request *req;		struct crypto_async_request *req;

	uint32_t ce_lock_count;
	struct work_struct unlock_ce_ws;		struct work_struct unlock_ce_ws;
	struct list_head engine_list; /* list of qcrypto engines */		struct list_head engine_list; /* list of qcrypto engines */
	int32_t total_units; /* total units of engines */		int32_t total_units; /* total units of engines */
	@@ -179,35 +177,6 @@ static struct crypto_priv qcrypto_dev;
	static struct crypto_engine *_qcrypto_static_assign_engine(		static struct crypto_engine *_qcrypto_static_assign_engine(
	struct crypto_priv *cp);		struct crypto_priv *cp);

	/*-------------------------------------------------------------------------
	* Resource Locking Service
	* ------------------------------------------------------------------------*/
	#define QCRYPTO_CMD_ID 1
	#define QCRYPTO_CE_LOCK_CMD 1
	#define QCRYPTO_CE_UNLOCK_CMD 0
	#define NUM_RETRY 1000
	#define CE_BUSY 55

	static int qcrypto_scm_cmd(int resource, int cmd, int *response)
	{
	#ifdef CONFIG_MSM_SCM

	struct {
	int resource;
	int cmd;
	} cmd_buf;

	cmd_buf.resource = resource;
	cmd_buf.cmd = cmd;

	return scm_call(SCM_SVC_TZ, QCRYPTO_CMD_ID, &cmd_buf,
	sizeof(cmd_buf), response, sizeof(*response));

	#else
	return 0;
	#endif
	}

	static struct crypto_engine _qrypto_find_pengine_device(struct crypto_priv cp,		static struct crypto_engine _qrypto_find_pengine_device(struct crypto_priv cp,
	unsigned int device)		unsigned int device)
	{		{
	@@ -288,49 +257,6 @@ void qcrypto_get_engine_list(size_t num_engines,
	}		}
	EXPORT_SYMBOL(qcrypto_get_engine_list);		EXPORT_SYMBOL(qcrypto_get_engine_list);

	static void qcrypto_unlock_ce(struct work_struct *work)
	{
	int response = 0;
	unsigned long flags;
	struct crypto_priv *cp = container_of(work, struct crypto_priv,
	unlock_ce_ws);
	if (cp->ce_lock_count == 1)
	BUG_ON(qcrypto_scm_cmd(cp->platform_support.shared_ce_resource,
	QCRYPTO_CE_UNLOCK_CMD, &response) != 0);
	spin_lock_irqsave(&cp->lock, flags);
	cp->ce_lock_count--;
	spin_unlock_irqrestore(&cp->lock, flags);
	}

	static int qcrypto_lock_ce(struct crypto_priv *cp)
	{
	unsigned long flags;
	int response = -CE_BUSY;
	int i = 0;

	if (cp->ce_lock_count == 0) {
	do {
	if (qcrypto_scm_cmd(
	cp->platform_support.shared_ce_resource,
	QCRYPTO_CE_LOCK_CMD, &response)) {
	response = -EINVAL;
	break;
	}
	} while ((response == -CE_BUSY) && (i++ < NUM_RETRY));

	if ((response == -CE_BUSY) && (i >= NUM_RETRY))
	return -EUSERS;
	if (response < 0)
	return -EINVAL;
	}
	spin_lock_irqsave(&cp->lock, flags);
	cp->ce_lock_count++;
	spin_unlock_irqrestore(&cp->lock, flags);


	return 0;
	}

	enum qcrypto_alg_type {		enum qcrypto_alg_type {
	QCRYPTO_ALG_CIPHER = 0,		QCRYPTO_ALG_CIPHER = 0,
	QCRYPTO_ALG_SHA = 1,		QCRYPTO_ALG_SHA = 1,
	@@ -1437,8 +1363,6 @@ static void _qce_ahash_complete(void cookie, unsigned char digest,
	kfree(rctx->data);		kfree(rctx->data);
	}		}

	if (cp->platform_support.ce_shared)
	schedule_work(&cp->unlock_ce_ws);
	tasklet_schedule(&pengine->done_tasklet);		tasklet_schedule(&pengine->done_tasklet);
	};		};

	@@ -1489,8 +1413,6 @@ static void _qce_ablk_cipher_complete(void cookie, unsigned char icb,
	kzfree(rctx->data);		kzfree(rctx->data);
	}		}

	if (cp->platform_support.ce_shared)
	schedule_work(&cp->unlock_ce_ws);
	tasklet_schedule(&pengine->done_tasklet);		tasklet_schedule(&pengine->done_tasklet);
	};		};

	@@ -1606,8 +1528,6 @@ static void _qce_aead_complete(void cookie, unsigned char icv,

	pengine->res = ret;		pengine->res = ret;

	if (cp->platform_support.ce_shared)
	schedule_work(&cp->unlock_ce_ws);
	tasklet_schedule(&pengine->done_tasklet);		tasklet_schedule(&pengine->done_tasklet);
	}		}

	@@ -2190,12 +2110,6 @@ static int _qcrypto_queue_req(struct crypto_priv *cp,
	int ret;		int ret;
	unsigned long flags;		unsigned long flags;

	if (cp->platform_support.ce_shared) {
	ret = qcrypto_lock_ce(cp);
	if (ret)
	return ret;
	}

	spin_lock_irqsave(&cp->lock, flags);		spin_lock_irqsave(&cp->lock, flags);

	if (pengine) {		if (pengine) {
	@@ -5156,11 +5070,9 @@ static int __init _qcrypto_init(void)
	return rc;		return rc;
	INIT_LIST_HEAD(&pcp->alg_list);		INIT_LIST_HEAD(&pcp->alg_list);
	INIT_LIST_HEAD(&pcp->engine_list);		INIT_LIST_HEAD(&pcp->engine_list);
	INIT_WORK(&pcp->unlock_ce_ws, qcrypto_unlock_ce);
	spin_lock_init(&pcp->lock);		spin_lock_init(&pcp->lock);
	mutex_init(&pcp->engine_lock);		mutex_init(&pcp->engine_lock);
	pcp->total_units = 0;		pcp->total_units = 0;
	pcp->ce_lock_count = 0;
	pcp->platform_support.bus_scale_table = NULL;		pcp->platform_support.bus_scale_table = NULL;
	pcp->next_engine = NULL;		pcp->next_engine = NULL;
	crypto_init_queue(&pcp->req_queue, MSM_QCRYPTO_REQ_QUEUE_LENGTH);		crypto_init_queue(&pcp->req_queue, MSM_QCRYPTO_REQ_QUEUE_LENGTH);