Loading arch/arm/boot/dts/qcom/msm8909-pm8916-camera-sensor-cdp.dtsi +2 −2 Original line number Diff line number Diff line /* * Copyright (c) 2014, The Linux Foundation. All rights reserved. * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -162,7 +162,7 @@ compatible = "qcom,camera"; reg = <0x1>; qcom,csiphy-sd-index = <0>; qcom,csid-sd-index = <0>; qcom,csid-sd-index = <1>; qcom,mount-angle = <90>; cam_vana-supply = <&pm8916_l17>; cam_vio-supply = <&pm8916_l6>; Loading arch/arm/boot/dts/qcom/msm8909-pm8916-camera.dtsi +24 −6 Original line number Diff line number Diff line /* * Copyright (c) 2014, The Linux Foundation. All rights reserved. * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -30,12 +30,13 @@ <&clock_gcc clk_gcc_camss_csi0phytimer_clk>, <&clock_gcc clk_camss_top_ahb_clk_src>, <&clock_gcc clk_gcc_camss_csi0phy_clk>, <&clock_gcc clk_gcc_camss_csi1phy_clk>, <&clock_gcc clk_gcc_camss_ahb_clk>; clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_src", "csi_phy_clk", "camss_ahb_src", "csi0_phy_clk", "csi1_phy_clk", "camss_ahb_clk"; qcom,clock-rates = <0 0 200000000 0 0 0 0>; qcom,clock-rates = <0 0 200000000 0 0 0 0 0>; }; qcom,csid@1b08000 { Loading Loading @@ -95,9 +96,26 @@ reg-names = "ispif", "csi_clk_mux"; interrupts = <0 51 0>; interrupt-names = "ispif"; clocks = <&clock_gcc clk_gcc_camss_ispif_ahb_clk>; clock-names = "ispif_ahb_clk"; qcom,clock-rates = <40000000>; clocks = <&clock_gcc clk_gcc_camss_ispif_ahb_clk>, <&clock_gcc clk_gcc_camss_ahb_clk>, <&clock_gcc clk_csi0_clk_src>, <&clock_gcc clk_gcc_camss_csi0_clk>, <&clock_gcc clk_gcc_camss_csi0pix_clk>, <&clock_gcc clk_gcc_camss_csi0rdi_clk>, <&clock_gcc clk_csi1_clk_src>, <&clock_gcc clk_gcc_camss_csi1_clk>, <&clock_gcc clk_gcc_camss_csi1pix_clk>, <&clock_gcc clk_gcc_camss_csi1rdi_clk>, <&clock_gcc clk_vfe0_clk_src>, <&clock_gcc clk_gcc_camss_vfe0_clk>, <&clock_gcc clk_gcc_camss_csi_vfe0_clk>; clock-names = "ispif_ahb_clk","camss_ahb_clk", "csi0_src_clk", "csi0_clk", "csi0_pix_clk","csi0_rdi_clk", "csi1_src_clk", "csi1_clk", "csi1_pix_clk", "csi1_rdi_clk", "vfe0_clk_src", "camss_vfe_vfe0_clk", "camss_csi_vfe0_clk"; qcom,clock-rates = <40000000 0 0 0 0 0 0 0 0 0 0 0 0>; }; qcom,vfe@1b10000 { Loading Loading
arch/arm/boot/dts/qcom/msm8909-pm8916-camera-sensor-cdp.dtsi +2 −2 Original line number Diff line number Diff line /* * Copyright (c) 2014, The Linux Foundation. All rights reserved. * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -162,7 +162,7 @@ compatible = "qcom,camera"; reg = <0x1>; qcom,csiphy-sd-index = <0>; qcom,csid-sd-index = <0>; qcom,csid-sd-index = <1>; qcom,mount-angle = <90>; cam_vana-supply = <&pm8916_l17>; cam_vio-supply = <&pm8916_l6>; Loading
arch/arm/boot/dts/qcom/msm8909-pm8916-camera.dtsi +24 −6 Original line number Diff line number Diff line /* * Copyright (c) 2014, The Linux Foundation. All rights reserved. * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -30,12 +30,13 @@ <&clock_gcc clk_gcc_camss_csi0phytimer_clk>, <&clock_gcc clk_camss_top_ahb_clk_src>, <&clock_gcc clk_gcc_camss_csi0phy_clk>, <&clock_gcc clk_gcc_camss_csi1phy_clk>, <&clock_gcc clk_gcc_camss_ahb_clk>; clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_src", "csi_phy_clk", "camss_ahb_src", "csi0_phy_clk", "csi1_phy_clk", "camss_ahb_clk"; qcom,clock-rates = <0 0 200000000 0 0 0 0>; qcom,clock-rates = <0 0 200000000 0 0 0 0 0>; }; qcom,csid@1b08000 { Loading Loading @@ -95,9 +96,26 @@ reg-names = "ispif", "csi_clk_mux"; interrupts = <0 51 0>; interrupt-names = "ispif"; clocks = <&clock_gcc clk_gcc_camss_ispif_ahb_clk>; clock-names = "ispif_ahb_clk"; qcom,clock-rates = <40000000>; clocks = <&clock_gcc clk_gcc_camss_ispif_ahb_clk>, <&clock_gcc clk_gcc_camss_ahb_clk>, <&clock_gcc clk_csi0_clk_src>, <&clock_gcc clk_gcc_camss_csi0_clk>, <&clock_gcc clk_gcc_camss_csi0pix_clk>, <&clock_gcc clk_gcc_camss_csi0rdi_clk>, <&clock_gcc clk_csi1_clk_src>, <&clock_gcc clk_gcc_camss_csi1_clk>, <&clock_gcc clk_gcc_camss_csi1pix_clk>, <&clock_gcc clk_gcc_camss_csi1rdi_clk>, <&clock_gcc clk_vfe0_clk_src>, <&clock_gcc clk_gcc_camss_vfe0_clk>, <&clock_gcc clk_gcc_camss_csi_vfe0_clk>; clock-names = "ispif_ahb_clk","camss_ahb_clk", "csi0_src_clk", "csi0_clk", "csi0_pix_clk","csi0_rdi_clk", "csi1_src_clk", "csi1_clk", "csi1_pix_clk", "csi1_rdi_clk", "vfe0_clk_src", "camss_vfe_vfe0_clk", "camss_csi_vfe0_clk"; qcom,clock-rates = <40000000 0 0 0 0 0 0 0 0 0 0 0 0>; }; qcom,vfe@1b10000 { Loading