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Commit 2be0f7d2 authored by Jordan Crouse's avatar Jordan Crouse
Browse files

msm: kgsl: Mark A4XX PWR and VBIF_PWR counter groups as fixed 



As A3XX mark the A4XX PWR and VBIF_PWR performance counter groups
as fixed and simplify the macros as much as possible.

Change-Id: Ic0dedbade78ab7007f07db0148ada7e6effc7dce
Signed-off-by: default avatarJordan Crouse <jcrouse@codeaurora.org>
parent ca6129fc

drivers/gpu/msm/adreno.h

+4 −8
Original line number Diff line number Diff line
@@ -277,16 +277,12 @@ struct adreno_invalid_countables { 
	int num_countables;

};



#define ADRENO_PERFCOUNTER_GROUP(core, name) { core##_perfcounters_##name, \

	ARRAY_SIZE(core##_perfcounters_##name), __stringify(name), 0 }



#define ADRENO_PERFCOUNTER_GROUP_FLAGS(core, name, flags) \

	{ core##_perfcounters_##name, \

#define ADRENO_PERFCOUNTER_GROUP_FLAGS(core, offset, name, flags) \

	[KGSL_PERFCOUNTER_GROUP_##offset] = { core##_perfcounters_##name, \

	ARRAY_SIZE(core##_perfcounters_##name), __stringify(name), flags }



#define ADRENO_PERFCOUNTER_GROUP_OFF(core, name, offset) \

	[KGSL_PERFCOUNTER_GROUP_##offset] = { core##_perfcounters_##name, \

	ARRAY_SIZE(core##_perfcounters_##name), __stringify(name), 0 }

#define ADRENO_PERFCOUNTER_GROUP(core, offset, name) \

	ADRENO_PERFCOUNTER_GROUP_FLAGS(core, offset, name, 0)



#define ADRENO_PERFCOUNTER_INVALID_COUNTABLE(name, off) \

	[KGSL_PERFCOUNTER_GROUP_##off] = { name##_invalid_countables, \

drivers/gpu/msm/adreno_a3xx.c

+21 −15
Original line number Diff line number Diff line
@@ -1805,23 +1805,29 @@ static struct adreno_perfcount_register a3xx_perfcounters_vbif_pwr[] = { 
		A3XX_VBIF_PERF_PWR_CNT2_HI, -1, 0 },

};



#define A3XX_PERFCOUNTER_GROUP(offset, name) \

	ADRENO_PERFCOUNTER_GROUP(a3xx, offset, name)



#define A3XX_PERFCOUNTER_GROUP_FLAGS(offset, name, flags) \

	ADRENO_PERFCOUNTER_GROUP_FLAGS(a3xx, offset, name, flags)



static struct adreno_perfcount_group a3xx_perfcounter_groups[] = {

	ADRENO_PERFCOUNTER_GROUP(a3xx, cp),

	ADRENO_PERFCOUNTER_GROUP(a3xx, rbbm),

	ADRENO_PERFCOUNTER_GROUP(a3xx, pc),

	ADRENO_PERFCOUNTER_GROUP(a3xx, vfd),

	ADRENO_PERFCOUNTER_GROUP(a3xx, hlsq),

	ADRENO_PERFCOUNTER_GROUP(a3xx, vpc),

	ADRENO_PERFCOUNTER_GROUP(a3xx, tse),

	ADRENO_PERFCOUNTER_GROUP(a3xx, ras),

	ADRENO_PERFCOUNTER_GROUP(a3xx, uche),

	ADRENO_PERFCOUNTER_GROUP(a3xx, tp),

	ADRENO_PERFCOUNTER_GROUP(a3xx, sp),

	ADRENO_PERFCOUNTER_GROUP(a3xx, rb),

	ADRENO_PERFCOUNTER_GROUP_FLAGS(a3xx, pwr,

	A3XX_PERFCOUNTER_GROUP(CP, cp),

	A3XX_PERFCOUNTER_GROUP(RBBM, rbbm),

	A3XX_PERFCOUNTER_GROUP(PC, pc),

	A3XX_PERFCOUNTER_GROUP(VFD, vfd),

	A3XX_PERFCOUNTER_GROUP(HLSQ, hlsq),

	A3XX_PERFCOUNTER_GROUP(VPC, vpc),

	A3XX_PERFCOUNTER_GROUP(TSE, tse),

	A3XX_PERFCOUNTER_GROUP(RAS, ras),

	A3XX_PERFCOUNTER_GROUP(UCHE, uche),

	A3XX_PERFCOUNTER_GROUP(TP, tp),

	A3XX_PERFCOUNTER_GROUP(SP, sp),

	A3XX_PERFCOUNTER_GROUP(RB, rb),

	A3XX_PERFCOUNTER_GROUP_FLAGS(PWR, pwr,

		ADRENO_PERFCOUNTER_GROUP_FIXED),

	ADRENO_PERFCOUNTER_GROUP(a3xx, vbif),

	ADRENO_PERFCOUNTER_GROUP_FLAGS(a3xx, vbif_pwr,

	A3XX_PERFCOUNTER_GROUP(VBIF, vbif),

	A3XX_PERFCOUNTER_GROUP_FLAGS(VBIF_PWR, vbif_pwr,

		ADRENO_PERFCOUNTER_GROUP_FIXED),

};

drivers/gpu/msm/adreno_a4xx.c

+25 −17
Original line number Diff line number Diff line
@@ -759,25 +759,33 @@ static struct adreno_perfcount_register a4xx_perfcounters_vbif_pwr[] = { 
		A4XX_VBIF_PERF_PWR_CNT_HIGH3, -1, A4XX_VBIF_PERF_PWR_CNT_EN3 },

};



#define A4XX_PERFCOUNTER_GROUP(offset, name) \

	ADRENO_PERFCOUNTER_GROUP(a4xx, offset, name)



#define A4XX_PERFCOUNTER_GROUP_FLAGS(offset, name, flags) \

	ADRENO_PERFCOUNTER_GROUP_FLAGS(a4xx, offset, name, flags)



static struct adreno_perfcount_group a4xx_perfcounter_groups

				[KGSL_PERFCOUNTER_GROUP_MAX] = {

	ADRENO_PERFCOUNTER_GROUP_OFF(a4xx, cp, CP),

	ADRENO_PERFCOUNTER_GROUP_OFF(a4xx, rbbm, RBBM),

	ADRENO_PERFCOUNTER_GROUP_OFF(a4xx, pc, PC),

	ADRENO_PERFCOUNTER_GROUP_OFF(a4xx, vfd, VFD),

	ADRENO_PERFCOUNTER_GROUP_OFF(a4xx, hlsq, HLSQ),

	ADRENO_PERFCOUNTER_GROUP_OFF(a4xx, vpc, VPC),

	ADRENO_PERFCOUNTER_GROUP_OFF(a4xx, ccu, CCU),

	ADRENO_PERFCOUNTER_GROUP_OFF(a4xx, tse, TSE),

	ADRENO_PERFCOUNTER_GROUP_OFF(a4xx, ras, RAS),

	ADRENO_PERFCOUNTER_GROUP_OFF(a4xx, uche, UCHE),

	ADRENO_PERFCOUNTER_GROUP_OFF(a4xx, tp, TP),

	ADRENO_PERFCOUNTER_GROUP_OFF(a4xx, sp, SP),

	ADRENO_PERFCOUNTER_GROUP_OFF(a4xx, rb, RB),

	ADRENO_PERFCOUNTER_GROUP_OFF(a4xx, vsc, VSC),

	ADRENO_PERFCOUNTER_GROUP_OFF(a4xx, pwr, PWR),

	ADRENO_PERFCOUNTER_GROUP_OFF(a4xx, vbif, VBIF),

	ADRENO_PERFCOUNTER_GROUP_OFF(a4xx, vbif_pwr, VBIF_PWR),

	A4XX_PERFCOUNTER_GROUP(CP, cp),

	A4XX_PERFCOUNTER_GROUP(RBBM, rbbm),

	A4XX_PERFCOUNTER_GROUP(PC, pc),

	A4XX_PERFCOUNTER_GROUP(VFD, vfd),

	A4XX_PERFCOUNTER_GROUP(HLSQ, hlsq),

	A4XX_PERFCOUNTER_GROUP(VPC, vpc),

	A4XX_PERFCOUNTER_GROUP(CCU, ccu),

	A4XX_PERFCOUNTER_GROUP(TSE, tse),

	A4XX_PERFCOUNTER_GROUP(RAS, ras),

	A4XX_PERFCOUNTER_GROUP(UCHE, uche),

	A4XX_PERFCOUNTER_GROUP(TP, tp),

	A4XX_PERFCOUNTER_GROUP(SP, sp),

	A4XX_PERFCOUNTER_GROUP(RB, rb),

	A4XX_PERFCOUNTER_GROUP(VSC, vsc),

	A4XX_PERFCOUNTER_GROUP_FLAGS(PWR, pwr,

		ADRENO_PERFCOUNTER_GROUP_FIXED),

	A4XX_PERFCOUNTER_GROUP(VBIF, vbif),

	A4XX_PERFCOUNTER_GROUP_FLAGS(VBIF_PWR, vbif_pwr,

		ADRENO_PERFCOUNTER_GROUP_FIXED),

};



static struct adreno_perfcounters a4xx_perfcounters = {