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Commit 1834c1f7 authored by Niranjana Vishwanathapura's avatar Niranjana Vishwanathapura
Browse files

ARM: dts: msm: Add DT support for SPSS and GENI-IR on MPQ8092 



Add SPSS and GENI-IR device nodes to the MPQ8092 device tree.
Also add default configuration for PMIC_GPIO_15 in the MPQ8092
device tree which is required to enable the SPSS slow clock.

Change-Id: Iea0c4ea3fed5ac7258c3c989a9b51459e98f30b1
Signed-off-by: default avatarNiranjana Vishwanathapura <nvishwan@codeaurora.org>
parent 94c52e4c

arch/arm/boot/dts/qcom/mpq8092-cdp.dtsi

+7 −0
Original line number Diff line number Diff line
@@ -203,6 +203,13 @@ 
	};



	gpio@ce00 { /* GPIO 15 */

		qcom,mode = <1>;                /* Digital output */

		qcom,output-type = <0>;         /* CMOS logic */

		qcom,pull = <5>;                /* No pull */

		qcom,vin-sel = <2>;             /* VIN 2 */

		qcom,src-sel = <2>;             /* Function 1 */

		qcom,out-strength = <2>;        /* Medium */

		qcom,master-en = <1>;           /* Enable GPIO */

	};



	gpio@cf00 { /* GPIO 16 */

arch/arm/boot/dts/qcom/mpq8092.dtsi

+21 −0
Original line number Diff line number Diff line
@@ -28,6 +28,7 @@ 
		serial1 = &blsp2_uart0;

		serial2 = &blsp2_uart3;

		spi12 = &spi_12;

		geni_ir1 = &geni_ir_1;

	};



	memory {
@@ -1487,6 +1488,26 @@ 
			rpm-channel-type = <15>; /* SMD_APPS_RPM */

	};



	qcom,msm-spss@fc5c3000 {

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;

		compatible = "qcom,msm-spss";

		reg-names = "base";

		reg = <0xfc5c3000 0x1000>;



		geni_ir_1: qcom,msm-geni-ir@fc5c1000 {

			compatible = "qcom,msm-geni-ir";

			reg-names = "base";

			reg = <0xfc5c1000 0x1000>;

			interrupts = <0 284 0>, <0 285 0>;

			interrupt-names = "geni-ir-core-irq",

					  "geni-ir-wakeup-irq";

			qcom,geni-ir-gpio-tx = <&msmgpio 8 0>;

			qcom,geni-ir-gpio-rx = <&msmgpio 9 0>;

		};

	};



	qcom,venus@fdce0000 {

		compatible = "qcom,pil-tz-generic";

		reg = <0xfdce0000 0x4000>;