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Commit 54090b6d authored by Kees Cook's avatar Kees Cook Committed by Alexander Alexeev
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arm64: Move ELF_ET_DYN_BASE to 4GB / 4MB



Now that explicitly executed loaders are loaded in the mmap region, we
have more freedom to decide where we position PIE binaries in the address
space to avoid possible collisions with mmap or stack regions.

For 64-bit, align to 4GB to allow runtimes to use the entire 32-bit
address space for 32-bit pointers. On 32-bit use 4MB, to match ARM. This
could be 0x8000, the standard ET_EXEC load address, but that is needlessly
close to the NULL address, and anyone running arm compat PIE will have an
MMU, so the tight mapping is not needed.

Cc: stable@vger.kernel.org
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: default avatarKees Cook <keescook@chromium.org>
parent c93365f3
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+6 −6
Original line number Diff line number Diff line
@@ -120,12 +120,11 @@ typedef struct user_fpsimd_state elf_fpregset_t;
#define ELF_EXEC_PAGESIZE	PAGE_SIZE

/*
 * This is the location that an ET_DYN program is loaded if exec'ed.  Typical
 * use of this is to invoke "./ld.so someprog" to test out a new version of
 * the loader.  We need to make sure that it is out of the way of the program
 * that it will "exec", and that there is sufficient room for the brk.
 * This is the base location for PIE (ET_DYN with INTERP) loads. On
 * 64-bit, this is raised to 4GB to leave the entire 32-bit address
 * space open for things that want to use the area for 32-bit pointers.
 */
#define ELF_ET_DYN_BASE	(2 * TASK_SIZE_64 / 3)
#define ELF_ET_DYN_BASE		0x100000000UL

/*
 * When the program starts, a1 contains a pointer to a function to be
@@ -169,7 +168,8 @@ extern unsigned long arch_randomize_brk(struct mm_struct *mm);
#define COMPAT_ELF_PLATFORM		("v8l")
#endif

#define COMPAT_ELF_ET_DYN_BASE		(2 * TASK_SIZE_32 / 3)
/* PIE load location for compat arm. Must match ARM ELF_ET_DYN_BASE. */
#define COMPAT_ELF_ET_DYN_BASE		0x000400000UL

/* AArch32 registers. */
#define COMPAT_ELF_NGREG		18