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Commit 678bc9a2 authored by Vishwanath BS's avatar Vishwanath BS Committed by Paul Walmsley
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OMAP3 clock: Introduce 3630 DPLL4 HSDivider changes



Divider (M2, M3, M4, M5 and M6) field width has been increased by 1 bit
in 3630. This patch has changes to accommodate this in CM dynamically
based on chip version.
Basically new clock nodes have been added for 3630 DPLL4 M2,M3,M4,M5 and
M6 and value of these nodes are used if cpu type is 3630.

Signed-off-by: default avatarVishwanath BS <vishwanath.bs@ti.com>
[paul@pwsan.com: updated to apply on 2.6.34 queue; comments added]
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
parent 358965d7
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