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Commit 0ffcbfd5 authored by Eric Miao's avatar Eric Miao Committed by Russell King
Browse files

[ARM] pxa: make cpu_is_pxa2* macros more consistent 



1. add a CPUID table in the comment

2. make cpu_is_pxa25x() true for PXA210/250/255/26x

3. PXA210 is treated as PXA25x, all related code modified to
   reflect this

Signed-off-by: default avatarEric Miao <eric.miao@marvell.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 2b12797c

arch/arm/mach-pxa/generic.c

+2 −2
Original line number Diff line number Diff line
@@ -46,7 +46,7 @@ void clear_reset_status(unsigned int mask) 
 */

unsigned int get_clk_frequency_khz(int info)

{

	if (cpu_is_pxa21x() || cpu_is_pxa25x())

	if (cpu_is_pxa25x())

		return pxa25x_get_clk_frequency_khz(info);

	else if (cpu_is_pxa27x())

		return pxa27x_get_clk_frequency_khz(info);
@@ -60,7 +60,7 @@ EXPORT_SYMBOL(get_clk_frequency_khz); 
 */

unsigned int get_memclk_frequency_10khz(void)

{

	if (cpu_is_pxa21x() || cpu_is_pxa25x())

	if (cpu_is_pxa25x())

		return pxa25x_get_memclk_frequency_10khz();

	else if (cpu_is_pxa27x())

		return pxa27x_get_memclk_frequency_10khz();

arch/arm/mach-pxa/include/mach/hardware.h

+64 −13
Original line number Diff line number Diff line
@@ -62,26 +62,72 @@ 


#ifndef __ASSEMBLY__



/*

 *   CPU     Stepping     CPU_ID         JTAG_ID

 *

 *  PXA210	B0	0x69052922	0x2926C013

 *  PXA210	B1	0x69052923	0x3926C013

 *  PXA210	B2	0x69052924	0x4926C013

 *  PXA210	C0	0x69052D25	0x5926C013

 *

 *  PXA250	A0	0x69052100	0x09264013

 *  PXA250	A1	0x69052101	0x19264013

 *  PXA250	B0	0x69052902	0x29264013

 *  PXA250	B1	0x69052903	0x39264013

 *  PXA250	B2	0x69052904	0x49264013

 *  PXA250	C0	0x69052D05	0x59264013

 *

 *  PXA255	A0	0x69052D06	0x69264013

 *

 *  PXA26x	A0	0x69052903	0x39264013

 *  PXA26x	B0	0x69052D05	0x59264013

 *

 *  PXA27x	A0	0x69054110	0x09265013

 *  PXA27x	A1	0x69054111	0x19265013

 *  PXA27x	B0	0x69054112	0x29265013

 *  PXA27x	B1	0x69054113	0x39265013

 *  PXA27x	C0	0x69054114	0x49265013

 *  PXA27x	C5	0x69054117	0x79265013

 *

 *  PXA30x	A0	0x69056880	0x0E648013

 *  PXA30x	A1	0x69056881	0x1E648013

 *  PXA31x	A0	0x69056890	0x0E649013

 *  PXA31x	A1	0x69056891	0x1E649013

 *  PXA31x	A2	0x69056892	0x2E649013

 *  PXA32x	B1	0x69056825	0x5E642013

 *  PXA32x	B2	0x69056826	0x6E642013

 *

 *  PXA930	B0	0x69056835	0x5E643013

 *  PXA930	B1	0x69056837	0x7E643013

 *  PXA930	B2	0x69056838	0x8E643013

 */

#ifdef CONFIG_PXA25x

#define __cpu_is_pxa21x(id)				\

#define __cpu_is_pxa210(id)				\

	({						\

		unsigned int _id = (id) >> 4 & 0xf3f;	\

		_id == 0x212;				\

		unsigned int _id = (id) & 0xf3f0;	\

		_id == 0x2120;				\

	})



#define __cpu_is_pxa250(id)				\

	({						\

		unsigned int _id = (id) & 0xf3ff;	\

		_id <= 0x2105;				\

	})



#define __cpu_is_pxa255(id)				\

	({						\

		unsigned int _id = (id) >> 4 & 0xfff;   \

		_id == 0x2d0;                           \

		unsigned int _id = (id) & 0xffff;	\

		_id == 0x2d06;				\

	})



#define __cpu_is_pxa25x(id)				\

	({						\

		unsigned int _id = (id) >> 4 & 0xfff;	\

		_id == 0x2d0 || _id == 0x290;		\

		unsigned int _id = (id) & 0xf300;	\

		_id == 0x2100;				\

	})

#else

#define __cpu_is_pxa21x(id)	(0)

#define __cpu_is_pxa210(id)	(0)

#define __cpu_is_pxa250(id)	(0)

#define __cpu_is_pxa255(id)	(0)

#define __cpu_is_pxa25x(id)	(0)

#endif
@@ -136,9 +182,14 @@ 
#define __cpu_is_pxa930(id)	(0)

#endif



#define cpu_is_pxa21x()					\

#define cpu_is_pxa210()					\

	({						\

		__cpu_is_pxa210(read_cpuid_id());	\

	})



#define cpu_is_pxa250()					\

	({						\

		__cpu_is_pxa21x(read_cpuid_id());	\

		__cpu_is_pxa250(read_cpuid_id());	\

	})



#define cpu_is_pxa255()                                 \

arch/arm/mach-pxa/pxa25x.c

+1 −1
Original line number Diff line number Diff line
@@ -348,7 +348,7 @@ static int __init pxa25x_init(void) 
{

	int i, ret = 0;



	if (cpu_is_pxa21x() || cpu_is_pxa25x()) {

	if (cpu_is_pxa25x()) {



		reset_status = RCSR;

arch/arm/mach-pxa/time.c

+1 −1
Original line number Diff line number Diff line
@@ -155,7 +155,7 @@ static void __init pxa_timer_init(void) 
	OIER = 0;

	OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;



	if (cpu_is_pxa21x() || cpu_is_pxa25x())

	if (cpu_is_pxa25x())

		clock_tick_rate = 3686400;

	else if (machine_is_mainstone())

		clock_tick_rate = 3249600;

drivers/mmc/host/pxamci.c

+2 −2
Original line number Diff line number Diff line
@@ -520,7 +520,7 @@ static int pxamci_probe(struct platform_device *pdev) 
	/*

	 * Block length register is only 10 bits before PXA27x.

	 */

	mmc->max_blk_size = (cpu_is_pxa21x() || cpu_is_pxa25x()) ? 1023 : 2048;

	mmc->max_blk_size = cpu_is_pxa25x() ? 1023 : 2048;



	/*

	 * Block count register is 16 bits.
@@ -554,7 +554,7 @@ static int pxamci_probe(struct platform_device *pdev) 
			 MMC_VDD_32_33|MMC_VDD_33_34;

	mmc->caps = 0;

	host->cmdat = 0;

	if (!cpu_is_pxa21x() && !cpu_is_pxa25x()) {

	if (!cpu_is_pxa25x()) {

		mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;

		host->cmdat |= CMDAT_SDIO_INT_EN;

		if (cpu_is_pxa300() || cpu_is_pxa310())