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Commit ffb927d1 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull USB fixes from Greg KH:
 "Here are some USB fixes and new device ids for 4.6-rc3.

  Nothing major, the normal USB gadget fixes and usb-serial driver ids,
  along with some other fixes mixed in.  All except the USB serial ids
  have been tested in linux-next, the id additions should be fine as
  they are 'trivial'"

* tag 'usb-4.6-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (25 commits)
  USB: option: add "D-Link DWM-221 B1" device id
  USB: serial: cp210x: Adding GE Healthcare Device ID
  USB: serial: ftdi_sio: Add support for ICP DAS I-756xU devices
  usb: dwc3: keystone: drop dma_mask configuration
  usb: gadget: udc-core: remove manual dma configuration
  usb: dwc3: pci: add ID for one more Intel Broxton platform
  usb: renesas_usbhs: fix to avoid using a disabled ep in usbhsg_queue_done()
  usb: dwc2: do not override forced dr_mode in gadget setup
  usb: gadget: f_midi: unlock on error
  USB: digi_acceleport: do sanity checking for the number of ports
  USB: cypress_m8: add endpoint sanity check
  USB: mct_u232: add sanity checking in probe
  usb: fix regression in SuperSpeed endpoint descriptor parsing
  USB: usbip: fix potential out-of-bounds write
  usb: renesas_usbhs: disable TX IRQ before starting TX DMAC transfer
  usb: renesas_usbhs: avoid NULL pointer derefernce in usbhsf_pkt_handler()
  usb: gadget: f_midi: Fixed a bug when buflen was smaller than wMaxPacketSize
  usb: phy: qcom-8x16: fix regulator API abuse
  usb: ch9: Fix SSP Device Cap wFunctionalitySupport type
  usb: gadget: composite: Access SSP Dev Cap fields properly
  ...
parents c6e6e58c 636c8a8d
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+7 −9
Original line number Original line Diff line number Diff line
@@ -75,8 +75,6 @@ static void usb_parse_ss_endpoint_companion(struct device *ddev, int cfgno,
	 * be the first thing immediately following the endpoint descriptor.
	 * be the first thing immediately following the endpoint descriptor.
	 */
	 */
	desc = (struct usb_ss_ep_comp_descriptor *) buffer;
	desc = (struct usb_ss_ep_comp_descriptor *) buffer;
	buffer += desc->bLength;
	size -= desc->bLength;


	if (desc->bDescriptorType != USB_DT_SS_ENDPOINT_COMP ||
	if (desc->bDescriptorType != USB_DT_SS_ENDPOINT_COMP ||
			size < USB_DT_SS_EP_COMP_SIZE) {
			size < USB_DT_SS_EP_COMP_SIZE) {
@@ -100,7 +98,8 @@ static void usb_parse_ss_endpoint_companion(struct device *ddev, int cfgno,
					ep->desc.wMaxPacketSize;
					ep->desc.wMaxPacketSize;
		return;
		return;
	}
	}

	buffer += desc->bLength;
	size -= desc->bLength;
	memcpy(&ep->ss_ep_comp, desc, USB_DT_SS_EP_COMP_SIZE);
	memcpy(&ep->ss_ep_comp, desc, USB_DT_SS_EP_COMP_SIZE);


	/* Check the various values */
	/* Check the various values */
@@ -146,12 +145,6 @@ static void usb_parse_ss_endpoint_companion(struct device *ddev, int cfgno,
		ep->ss_ep_comp.bmAttributes = 2;
		ep->ss_ep_comp.bmAttributes = 2;
	}
	}


	/* Parse a possible SuperSpeedPlus isoc ep companion descriptor */
	if (usb_endpoint_xfer_isoc(&ep->desc) &&
	    USB_SS_SSP_ISOC_COMP(desc->bmAttributes))
		usb_parse_ssp_isoc_endpoint_companion(ddev, cfgno, inum, asnum,
							ep, buffer, size);

	if (usb_endpoint_xfer_isoc(&ep->desc))
	if (usb_endpoint_xfer_isoc(&ep->desc))
		max_tx = (desc->bMaxBurst + 1) *
		max_tx = (desc->bMaxBurst + 1) *
			(USB_SS_MULT(desc->bmAttributes)) *
			(USB_SS_MULT(desc->bmAttributes)) *
@@ -171,6 +164,11 @@ static void usb_parse_ss_endpoint_companion(struct device *ddev, int cfgno,
				max_tx);
				max_tx);
		ep->ss_ep_comp.wBytesPerInterval = cpu_to_le16(max_tx);
		ep->ss_ep_comp.wBytesPerInterval = cpu_to_le16(max_tx);
	}
	}
	/* Parse a possible SuperSpeedPlus isoc ep companion descriptor */
	if (usb_endpoint_xfer_isoc(&ep->desc) &&
	    USB_SS_SSP_ISOC_COMP(desc->bmAttributes))
		usb_parse_ssp_isoc_endpoint_companion(ddev, cfgno, inum, asnum,
							ep, buffer, size);
}
}


static int usb_parse_endpoint(struct device *ddev, int cfgno, int inum,
static int usb_parse_endpoint(struct device *ddev, int cfgno, int inum,
+18 −5
Original line number Original line Diff line number Diff line
@@ -2254,6 +2254,7 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
{
{
	u32 intmsk;
	u32 intmsk;
	u32 val;
	u32 val;
	u32 usbcfg;


	/* Kill any ep0 requests as controller will be reinitialized */
	/* Kill any ep0 requests as controller will be reinitialized */
	kill_all_requests(hsotg, hsotg->eps_out[0], -ECONNRESET);
	kill_all_requests(hsotg, hsotg->eps_out[0], -ECONNRESET);
@@ -2267,10 +2268,16 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
	 * set configuration.
	 * set configuration.
	 */
	 */


	/* keep other bits untouched (so e.g. forced modes are not lost) */
	usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
	usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP |
		GUSBCFG_HNPCAP);

	/* set the PLL on, remove the HNP/SRP and set the PHY */
	/* set the PLL on, remove the HNP/SRP and set the PHY */
	val = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5;
	val = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5;
	dwc2_writel(hsotg->phyif | GUSBCFG_TOUTCAL(7) |
	usbcfg |= hsotg->phyif | GUSBCFG_TOUTCAL(7) |
	       (val << GUSBCFG_USBTRDTIM_SHIFT), hsotg->regs + GUSBCFG);
		(val << GUSBCFG_USBTRDTIM_SHIFT);
	dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);


	dwc2_hsotg_init_fifo(hsotg);
	dwc2_hsotg_init_fifo(hsotg);


@@ -3031,6 +3038,7 @@ static struct usb_ep_ops dwc2_hsotg_ep_ops = {
static void dwc2_hsotg_init(struct dwc2_hsotg *hsotg)
static void dwc2_hsotg_init(struct dwc2_hsotg *hsotg)
{
{
	u32 trdtim;
	u32 trdtim;
	u32 usbcfg;
	/* unmask subset of endpoint interrupts */
	/* unmask subset of endpoint interrupts */


	dwc2_writel(DIEPMSK_TIMEOUTMSK | DIEPMSK_AHBERRMSK |
	dwc2_writel(DIEPMSK_TIMEOUTMSK | DIEPMSK_AHBERRMSK |
@@ -3054,11 +3062,16 @@ static void dwc2_hsotg_init(struct dwc2_hsotg *hsotg)


	dwc2_hsotg_init_fifo(hsotg);
	dwc2_hsotg_init_fifo(hsotg);


	/* keep other bits untouched (so e.g. forced modes are not lost) */
	usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
	usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP |
		GUSBCFG_HNPCAP);

	/* set the PLL on, remove the HNP/SRP and set the PHY */
	/* set the PLL on, remove the HNP/SRP and set the PHY */
	trdtim = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5;
	trdtim = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5;
	dwc2_writel(hsotg->phyif | GUSBCFG_TOUTCAL(7) |
	usbcfg |= hsotg->phyif | GUSBCFG_TOUTCAL(7) |
		(trdtim << GUSBCFG_USBTRDTIM_SHIFT),
		(trdtim << GUSBCFG_USBTRDTIM_SHIFT);
		hsotg->regs + GUSBCFG);
	dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);


	if (using_dma(hsotg))
	if (using_dma(hsotg))
		__orr32(hsotg->regs + GAHBCFG, GAHBCFG_DMA_EN);
		__orr32(hsotg->regs + GAHBCFG, GAHBCFG_DMA_EN);
+18 −30
Original line number Original line Diff line number Diff line
@@ -67,23 +67,9 @@ void dwc3_set_mode(struct dwc3 *dwc, u32 mode)
static int dwc3_core_soft_reset(struct dwc3 *dwc)
static int dwc3_core_soft_reset(struct dwc3 *dwc)
{
{
	u32		reg;
	u32		reg;
	int		retries = 1000;
	int		ret;
	int		ret;


	/* Before Resetting PHY, put Core in Reset */
	reg = dwc3_readl(dwc->regs, DWC3_GCTL);
	reg |= DWC3_GCTL_CORESOFTRESET;
	dwc3_writel(dwc->regs, DWC3_GCTL, reg);

	/* Assert USB3 PHY reset */
	reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
	reg |= DWC3_GUSB3PIPECTL_PHYSOFTRST;
	dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);

	/* Assert USB2 PHY reset */
	reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
	reg |= DWC3_GUSB2PHYCFG_PHYSOFTRST;
	dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);

	usb_phy_init(dwc->usb2_phy);
	usb_phy_init(dwc->usb2_phy);
	usb_phy_init(dwc->usb3_phy);
	usb_phy_init(dwc->usb3_phy);
	ret = phy_init(dwc->usb2_generic_phy);
	ret = phy_init(dwc->usb2_generic_phy);
@@ -95,26 +81,28 @@ static int dwc3_core_soft_reset(struct dwc3 *dwc)
		phy_exit(dwc->usb2_generic_phy);
		phy_exit(dwc->usb2_generic_phy);
		return ret;
		return ret;
	}
	}
	mdelay(100);


	/* Clear USB3 PHY reset */
	/*
	reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
	 * We're resetting only the device side because, if we're in host mode,
	reg &= ~DWC3_GUSB3PIPECTL_PHYSOFTRST;
	 * XHCI driver will reset the host block. If dwc3 was configured for
	dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
	 * host-only mode, then we can return early.
	 */
	if (dwc->dr_mode == USB_DR_MODE_HOST)
		return 0;


	/* Clear USB2 PHY reset */
	reg = dwc3_readl(dwc->regs, DWC3_DCTL);
	reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
	reg |= DWC3_DCTL_CSFTRST;
	reg &= ~DWC3_GUSB2PHYCFG_PHYSOFTRST;
	dwc3_writel(dwc->regs, DWC3_DCTL, reg);
	dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);


	mdelay(100);
	do {
		reg = dwc3_readl(dwc->regs, DWC3_DCTL);
		if (!(reg & DWC3_DCTL_CSFTRST))
			return 0;


	/* After PHYs are stable we can take Core out of reset state */
		udelay(1);
	reg = dwc3_readl(dwc->regs, DWC3_GCTL);
	} while (--retries);
	reg &= ~DWC3_GCTL_CORESOFTRESET;
	dwc3_writel(dwc->regs, DWC3_GCTL, reg);


	return 0;
	return -ETIMEDOUT;
}
}


/**
/**
+0 −5
Original line number Original line Diff line number Diff line
@@ -39,8 +39,6 @@
#define USBSS_IRQ_COREIRQ_EN	BIT(0)
#define USBSS_IRQ_COREIRQ_EN	BIT(0)
#define USBSS_IRQ_COREIRQ_CLR	BIT(0)
#define USBSS_IRQ_COREIRQ_CLR	BIT(0)


static u64 kdwc3_dma_mask;

struct dwc3_keystone {
struct dwc3_keystone {
	struct device			*dev;
	struct device			*dev;
	struct clk			*clk;
	struct clk			*clk;
@@ -108,9 +106,6 @@ static int kdwc3_probe(struct platform_device *pdev)
	if (IS_ERR(kdwc->usbss))
	if (IS_ERR(kdwc->usbss))
		return PTR_ERR(kdwc->usbss);
		return PTR_ERR(kdwc->usbss);


	kdwc3_dma_mask = dma_get_mask(dev);
	dev->dma_mask = &kdwc3_dma_mask;

	kdwc->clk = devm_clk_get(kdwc->dev, "usb");
	kdwc->clk = devm_clk_get(kdwc->dev, "usb");


	error = clk_prepare_enable(kdwc->clk);
	error = clk_prepare_enable(kdwc->clk);
+2 −0
Original line number Original line Diff line number Diff line
@@ -35,6 +35,7 @@
#define PCI_DEVICE_ID_INTEL_SPTLP		0x9d30
#define PCI_DEVICE_ID_INTEL_SPTLP		0x9d30
#define PCI_DEVICE_ID_INTEL_SPTH		0xa130
#define PCI_DEVICE_ID_INTEL_SPTH		0xa130
#define PCI_DEVICE_ID_INTEL_BXT			0x0aaa
#define PCI_DEVICE_ID_INTEL_BXT			0x0aaa
#define PCI_DEVICE_ID_INTEL_BXT_M		0x1aaa
#define PCI_DEVICE_ID_INTEL_APL			0x5aaa
#define PCI_DEVICE_ID_INTEL_APL			0x5aaa


static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
@@ -213,6 +214,7 @@ static const struct pci_device_id dwc3_pci_id_table[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTLP), },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTLP), },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTH), },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTH), },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT), },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT), },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT_M), },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_APL), },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_APL), },
	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB), },
	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB), },
	{  }	/* Terminating Entry */
	{  }	/* Terminating Entry */
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