Merge "Merge commit 'bf912d665e9ac46d924db8813c9e00448b85175a' into... (fa96a4c8) · Commits · e / devices / android_kernel_xiaomi_sm6125

AndroidKernel.mk

+21 −3

Original line number	Diff line number	Diff line
		@@ -101,6 +101,17 @@ else
		KERNEL_OUT := $(TARGET_OUT_INTERMEDIATES)/KERNEL_OBJ
		endif

		# Add RTIC DTB to dtb.img if RTIC MPGen is enabled.
		# Note: unfortunately we can't define RTIC DTS + DTB rule here as the
		# following variable/ tools (needed for DTS generation)
		# are missing - DTB_OBJS, OBJDUMP, KCONFIG_CONFIG, CC, DTC_FLAGS (the only available is DTC).
		# The existing RTIC kernel integration in scripts/link-vmlinux.sh generates RTIC MP DTS
		# that will be compiled with optional rule below.
		# To be safe, we check for MPGen enable.
		ifdef RTIC_MPGEN
		RTIC_DTB := $(KERNEL_SYMLINK)/rtic_mp.dtb
		endif

		KERNEL_CONFIG := $(KERNEL_OUT)/.config

		ifeq ($(KERNEL_DEFCONFIG)$(wildcard $(KERNEL_CONFIG)),)
		@@ -209,12 +220,19 @@ $(KERNEL_HEADERS_INSTALL): $(KERNEL_OUT)
		echo $(KERNEL_CONFIG_OVERRIDE) >> $(KERNEL_OUT)/.config; \
		$(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) oldconfig; fi

		# RTIC DTS to DTB (if MPGen enabled;
		# and make sure we don't break the build if rtic_mp.dts missing)
		$(RTIC_DTB): $(INSTALLED_KERNEL_TARGET)
		stat $(KERNEL_SYMLINK)/rtic_mp.dts 2>/dev/null >&2 && \
		$(DTC) -O dtb -o $(RTIC_DTB) -b 1 $(DTC_FLAGS) $(KERNEL_SYMLINK)/rtic_mp.dts \|\| \
		touch $(RTIC_DTB)

		# Creating a dtb.img once the kernel is compiled if TARGET_KERNEL_APPEND_DTB is set to be false
		$(INSTALLED_DTBIMAGE_TARGET): $(TARGET_PREBUILT_INT_KERNEL)
		$(INSTALLED_DTBIMAGE_TARGET): $(TARGET_PREBUILT_INT_KERNEL) $(INSTALLED_KERNEL_TARGET) $(RTIC_DTB)
		$(hide) if [ -d "$(KERNEL_OUT)/arch/$(KERNEL_ARCH)/boot/dts/vendor/" ]; then \
		cat $(KERNEL_OUT)/arch/$(KERNEL_ARCH)/boot/dts/vendor/qcom/*.dtb > $@; \
		cat $(KERNEL_OUT)/arch/$(KERNEL_ARCH)/boot/dts/vendor/qcom/*.dtb $(RTIC_DTB) > $@; \
		else \
		cat $(KERNEL_OUT)/arch/$(KERNEL_ARCH)/boot/dts/qcom/*.dtb > $@; \
		cat $(KERNEL_OUT)/arch/$(KERNEL_ARCH)/boot/dts/qcom/*.dtb $(RTIC_DTB) > $@; \
		fi

		.PHONY: kerneltags

Documentation/devicetree/bindings/pci/msm_pcie.txt

+7 −0

Original line number	Diff line number	Diff line
		@@ -74,10 +74,16 @@ Optional Properties:
		is changed from L0s to L0.
		- qcom,phy-power-down-offset: Offset from PCIe PHY base to control the power state
		of the PHY.
		- qcom,core-preset: Value for PCIe core preset. Determines how aggressive the
		PCIe PHY equalization is. The following are recommended settings:
		short channels: 0x55555555 (default)
		long channels: 0x77777777
		- qcom,pcie-phy-ver: version of PCIe PHY.
		- qcom,phy-sequence: The initialization sequence to bring up the PCIe PHY.
		Should be specified in groups (offset, value, delay).
		Should be specified in groups (offset, value, delay).
		- qcom,bw-scale: Table of CX voltage and rate change clock frequency pair
		for PCIe bandwidth scaling.
		- qcom,use-19p2mhz-aux-clk: The frequency of PCIe AUX clock is 19.2MHz.
		- qcom,boot-option: Bits that alter PCIe bus driver boot sequence.
		Below details what happens when each bit is set
		@@ -286,6 +292,7 @@ Example:
		qcom,phy-status-offset = <0x800>;
		qcom,phy-status-status = <6>;
		qcom,phy-power-down-offset = <0x840>;
		qcom,core-preset = <0x55555555>; /* short channels */
		qcom,cpl-timeout = <0x2>;

		iommus = <&anoc0_smmu>;

Documentation/devicetree/bindings/power/supply/qcom/qpnp-qg.txt

+22 −0

Original line number	Diff line number	Diff line
		@@ -404,6 +404,28 @@ First Level Node - QGAUGE device
		'qcom,qg-fast-chg-config' is enabled. The
		default value if not specified is 1.

		- qcom,fvss-enable
		Usage: optional
		Value type: bool
		Definition: Enable Filtered Voltage based SOC scaling.
		This logic enables SOC scaling to report
		0 at the cutoff voltage.

		- qcom,fvss-vbatt-mv
		Usage: optional
		Value type: <u32>
		Definition: Battery voltage threshold at which FVSS is
		enabled. Applicable only if 'qcom,fvss-enable'
		is set.

		- qcom,multi-profile-load
		Usage: optional
		Value type: <bool>
		Definition: A boolean property that when specified indicates that
		multiple profile loading needs to be enabled. This requires
		multiple battery profiles to be specified for a battery for
		proper functionality.

		==========================================================
		Second Level Nodes - Peripherals managed by QGAUGE driver
		==========================================================

Documentation/devicetree/bindings/power/supply/qcom/qpnp-smb5.txt

+11 −0

Original line number	Diff line number	Diff line
		@@ -339,6 +339,17 @@ Charger specific properties:
		Value type: bool
		Definition: Boolean flag which when present enables ADC based AICL.

		- qcom,disable-sw-thermal-regulation
		Usage: optional
		Value type: bool
		Definition: Boolean flag which when present disables the software thermal
		regulation.

		- qcom,disable-fcc-restriction
		Usage: optional
		Value type: bool
		Definition: Boolean flag which when present disables FCC restriction.

		=============================================
		Second Level Nodes - SMB5 Charger Peripherals
		=============================================

Documentation/devicetree/bindings/regulator/qpnp-amoled-regulator.txt

+0 −9

Original line number	Diff line number	Diff line
		@@ -67,15 +67,6 @@ Subnode common properties for OLEDB and AB/IBB regulator devices.
		Definition: A boolean property to specify that the pull down control
		for AB/IBB needs to be configured during AOD mode.

		Subnode properties for AB regulator device.

		- qcom,aod-entry-poll-time-ms:
		Usage: optional
		Value type: <u32>
		Definition: Poll timeout (in ms) for AB VREG_OK to go low during AOD
		entry. If this is not specified, a default value of 100 ms
		is used.

		Example:

		pm8150a_amoled: oledb@e000 {