mhi: cntrl: qcom: move certain logs to controller log buffer (fa4f7983) · Commits · e / devices / android_kernel_xiaomi_sm6125

drivers/bus/mhi/controllers/mhi_arch_qcom.c

+39 −35

Original line number	Original line	Diff line number	Diff line
	@@ -155,7 +155,7 @@ static void mhi_arch_pci_link_state_cb(struct msm_pcie_notify *notify)

	switch (notify->event) {		switch (notify->event) {
	case MSM_PCIE_EVENT_WAKEUP:		case MSM_PCIE_EVENT_WAKEUP:
	MHI_LOG("Received MSM_PCIE_EVENT_WAKE signal\n");		MHI_CNTRL_LOG("Received PCIE_WAKE signal\n");

	/* bring link out of d3cold */		/* bring link out of d3cold */
	if (mhi_dev->powered_on) {		if (mhi_dev->powered_on) {
	@@ -164,13 +164,13 @@ static void mhi_arch_pci_link_state_cb(struct msm_pcie_notify *notify)
	}		}
	break;		break;
	case MSM_PCIE_EVENT_L1SS_TIMEOUT:		case MSM_PCIE_EVENT_L1SS_TIMEOUT:
	MHI_VERB("Received MSM_PCIE_EVENT_L1SS_TIMEOUT signal\n");		MHI_VERB("Received PCIE_L1SS_TIMEOUT signal\n");

	pm_runtime_mark_last_busy(&pci_dev->dev);		pm_runtime_mark_last_busy(&pci_dev->dev);
	pm_request_autosuspend(&pci_dev->dev);		pm_request_autosuspend(&pci_dev->dev);
	break;		break;
	default:		default:
	MHI_ERR("Unhandled event 0x%x\n", notify->event);		MHI_CNTRL_LOG("Unhandled event 0x%x\n", notify->event);
	}		}
	}		}

	@@ -183,12 +183,12 @@ static int mhi_arch_esoc_ops_power_on(void *priv, unsigned int flags)

	mutex_lock(&mhi_cntrl->pm_mutex);		mutex_lock(&mhi_cntrl->pm_mutex);
	if (mhi_dev->powered_on) {		if (mhi_dev->powered_on) {
	MHI_LOG("MHI still in active state\n");		MHI_CNTRL_LOG("MHI still in active state\n");
	mutex_unlock(&mhi_cntrl->pm_mutex);		mutex_unlock(&mhi_cntrl->pm_mutex);
	return 0;		return 0;
	}		}

	MHI_LOG("Enter\n");		MHI_CNTRL_LOG("Enter: mdm_crashed:%d\n", flags & ESOC_HOOK_MDM_CRASH);

	/* reset rpm state */		/* reset rpm state */
	pm_runtime_set_active(&pci_dev->dev);		pm_runtime_set_active(&pci_dev->dev);
	@@ -197,7 +197,7 @@ static int mhi_arch_esoc_ops_power_on(void *priv, unsigned int flags)
	pm_runtime_forbid(&pci_dev->dev);		pm_runtime_forbid(&pci_dev->dev);
	ret = pm_runtime_get_sync(&pci_dev->dev);		ret = pm_runtime_get_sync(&pci_dev->dev);
	if (ret < 0) {		if (ret < 0) {
	MHI_ERR("Error with rpm resume, ret:%d\n", ret);		MHI_CNTRL_ERR("Error with rpm resume, ret:%d\n", ret);
	return ret;		return ret;
	}		}

	@@ -205,7 +205,7 @@ static int mhi_arch_esoc_ops_power_on(void *priv, unsigned int flags)
	ret = msm_pcie_pm_control(MSM_PCIE_RESUME, pci_dev->bus->number,		ret = msm_pcie_pm_control(MSM_PCIE_RESUME, pci_dev->bus->number,
	pci_dev, NULL, 0);		pci_dev, NULL, 0);
	if (ret) {		if (ret) {
	MHI_ERR("Failed to resume pcie bus ret %d\n", ret);		MHI_CNTRL_ERR("Failed to resume pcie bus ret %d\n", ret);
	return ret;		return ret;
	}		}

	@@ -218,7 +218,7 @@ static void mhi_arch_link_off(struct mhi_controller *mhi_cntrl)
	struct mhi_dev *mhi_dev = mhi_controller_get_devdata(mhi_cntrl);		struct mhi_dev *mhi_dev = mhi_controller_get_devdata(mhi_cntrl);
	struct pci_dev *pci_dev = mhi_dev->pci_dev;		struct pci_dev *pci_dev = mhi_dev->pci_dev;

	MHI_LOG("Entered\n");		MHI_CNTRL_LOG("Entered\n");

	pci_set_power_state(pci_dev, PCI_D3hot);		pci_set_power_state(pci_dev, PCI_D3hot);

	@@ -226,7 +226,7 @@ static void mhi_arch_link_off(struct mhi_controller *mhi_cntrl)
	msm_pcie_pm_control(MSM_PCIE_SUSPEND, mhi_cntrl->bus, pci_dev, NULL, 0);		msm_pcie_pm_control(MSM_PCIE_SUSPEND, mhi_cntrl->bus, pci_dev, NULL, 0);
	mhi_arch_set_bus_request(mhi_cntrl, 0);		mhi_arch_set_bus_request(mhi_cntrl, 0);

	MHI_LOG("Exited\n");		MHI_CNTRL_LOG("Exited\n");
	}		}

	static void mhi_arch_esoc_ops_power_off(void *priv, unsigned int flags)		static void mhi_arch_esoc_ops_power_off(void *priv, unsigned int flags)
	@@ -237,7 +237,7 @@ static void mhi_arch_esoc_ops_power_off(void *priv, unsigned int flags)
	struct arch_info *arch_info = mhi_dev->arch_info;		struct arch_info *arch_info = mhi_dev->arch_info;
	struct pci_dev *pci_dev = mhi_dev->pci_dev;		struct pci_dev *pci_dev = mhi_dev->pci_dev;

	MHI_LOG("Enter: mdm_crashed:%d\n", mdm_state);		MHI_CNTRL_LOG("Enter: mdm_crashed:%d\n", mdm_state);

	/*		/*
	* Abort system suspend if system is preparing to go to suspend		* Abort system suspend if system is preparing to go to suspend
	@@ -253,7 +253,7 @@ static void mhi_arch_esoc_ops_power_off(void *priv, unsigned int flags)

	mutex_lock(&mhi_cntrl->pm_mutex);		mutex_lock(&mhi_cntrl->pm_mutex);
	if (!mhi_dev->powered_on) {		if (!mhi_dev->powered_on) {
	MHI_LOG("Not in active state\n");		MHI_CNTRL_LOG("Not in active state\n");
	mutex_unlock(&mhi_cntrl->pm_mutex);		mutex_unlock(&mhi_cntrl->pm_mutex);
	pm_runtime_put_noidle(&pci_dev->dev);		pm_runtime_put_noidle(&pci_dev->dev);
	return;		return;
	@@ -263,7 +263,7 @@ static void mhi_arch_esoc_ops_power_off(void *priv, unsigned int flags)

	pm_runtime_put_noidle(&pci_dev->dev);		pm_runtime_put_noidle(&pci_dev->dev);

	MHI_LOG("Triggering shutdown process\n");		MHI_CNTRL_LOG("Triggering shutdown process\n");
	mhi_power_down(mhi_cntrl, !mdm_state);		mhi_power_down(mhi_cntrl, !mdm_state);

	/* turn the link off */		/* turn the link off */
	@@ -283,12 +283,10 @@ static void mhi_arch_esoc_ops_mdm_error(void *priv)
	{		{
	struct mhi_controller *mhi_cntrl = priv;		struct mhi_controller *mhi_cntrl = priv;

	MHI_LOG("Enter: mdm asserted\n");		MHI_CNTRL_LOG("Enter: mdm asserted\n");

	/* transition MHI state into error state */		/* transition MHI state into error state */
	mhi_control_error(mhi_cntrl);		mhi_control_error(mhi_cntrl);

	MHI_LOG("Exit\n");
	}		}

	static void mhi_bl_dl_cb(struct mhi_device *mhi_device,		static void mhi_bl_dl_cb(struct mhi_device *mhi_device,
	@@ -388,8 +386,9 @@ static int mhi_arch_pcie_scale_bw(struct mhi_controller *mhi_cntrl,
	/* do a bus scale vote based on gen speeds */		/* do a bus scale vote based on gen speeds */
	mhi_arch_set_bus_request(mhi_cntrl, link_info->target_link_speed);		mhi_arch_set_bus_request(mhi_cntrl, link_info->target_link_speed);

	MHI_VERB("bw changed to speed:0x%x width:0x%x\n",		MHI_LOG("BW changed to speed:0x%x width:0x%x\n",
	link_info->target_link_speed, link_info->target_link_width);		link_info->target_link_speed,
			link_info->target_link_width);

	return 0;		return 0;
	}		}
	@@ -504,7 +503,8 @@ int mhi_arch_pcie_init(struct mhi_controller *mhi_cntrl)
	reg_event->notify.data = mhi_cntrl;		reg_event->notify.data = mhi_cntrl;
	ret = msm_pcie_register_event(reg_event);		ret = msm_pcie_register_event(reg_event);
	if (ret)		if (ret)
	MHI_LOG("Failed to reg. for link up notification\n");		MHI_CNTRL_ERR(
			"Failed to reg. for link up notification\n");

	init_completion(&arch_info->pm_completion);		init_completion(&arch_info->pm_completion);

	@@ -521,7 +521,7 @@ int mhi_arch_pcie_init(struct mhi_controller *mhi_cntrl)
	arch_info->esoc_client = devm_register_esoc_client(		arch_info->esoc_client = devm_register_esoc_client(
	&mhi_dev->pci_dev->dev, "mdm");		&mhi_dev->pci_dev->dev, "mdm");
	if (IS_ERR_OR_NULL(arch_info->esoc_client)) {		if (IS_ERR_OR_NULL(arch_info->esoc_client)) {
	MHI_ERR("Failed to register esoc client\n");		MHI_CNTRL_ERR("Failed to register esoc client\n");
	} else {		} else {
	/* register for power on/off hooks */		/* register for power on/off hooks */
	struct esoc_client_hook *esoc_ops =		struct esoc_client_hook *esoc_ops =
	@@ -539,7 +539,7 @@ int mhi_arch_pcie_init(struct mhi_controller *mhi_cntrl)
	ret = esoc_register_client_hook(arch_info->esoc_client,		ret = esoc_register_client_hook(arch_info->esoc_client,
	esoc_ops);		esoc_ops);
	if (ret)		if (ret)
	MHI_ERR("Failed to register esoc ops\n");		MHI_CNTRL_ERR("Failed to register esoc ops\n");
	}		}

	/*		/*
	@@ -595,7 +595,7 @@ static struct dma_iommu_mapping *mhi_arch_create_iommu_mapping(
	size = (mhi_dev->iova_stop - base) + 1;		size = (mhi_dev->iova_stop - base) + 1;
	}		}

	MHI_LOG("Create iommu mapping of base:%pad size:%zu\n",		MHI_CNTRL_LOG("Create iommu mapping of base:%pad size:%zu\n",
	&base, size);		&base, size);
	return arm_iommu_create_mapping(&pci_bus_type, base, size);		return arm_iommu_create_mapping(&pci_bus_type, base, size);
	}		}
	@@ -622,7 +622,7 @@ int mhi_arch_iommu_init(struct mhi_controller *mhi_cntrl)
	ret = iommu_domain_set_attr(mapping->domain,		ret = iommu_domain_set_attr(mapping->domain,
	DOMAIN_ATTR_S1_BYPASS, &s1_bypass);		DOMAIN_ATTR_S1_BYPASS, &s1_bypass);
	if (ret) {		if (ret) {
	MHI_ERR("Failed to set attribute S1_BYPASS\n");		MHI_CNTRL_ERR("Failed to set attribute S1_BYPASS\n");
	goto release_mapping;		goto release_mapping;
	}		}
	}		}
	@@ -633,7 +633,7 @@ int mhi_arch_iommu_init(struct mhi_controller *mhi_cntrl)
	ret = iommu_domain_set_attr(mapping->domain, DOMAIN_ATTR_FAST,		ret = iommu_domain_set_attr(mapping->domain, DOMAIN_ATTR_FAST,
	&fast_map);		&fast_map);
	if (ret) {		if (ret) {
	MHI_ERR("Failed to set attribute FAST_MAP\n");		MHI_CNTRL_ERR("Failed to set attribute FAST_MAP\n");
	goto release_mapping;		goto release_mapping;
	}		}
	}		}
	@@ -644,7 +644,7 @@ int mhi_arch_iommu_init(struct mhi_controller *mhi_cntrl)
	ret = iommu_domain_set_attr(mapping->domain, DOMAIN_ATTR_ATOMIC,		ret = iommu_domain_set_attr(mapping->domain, DOMAIN_ATTR_ATOMIC,
	&atomic);		&atomic);
	if (ret) {		if (ret) {
	MHI_ERR("Failed to set attribute ATOMIC\n");		MHI_CNTRL_ERR("Failed to set attribute ATOMIC\n");
	goto release_mapping;		goto release_mapping;
	}		}
	}		}
	@@ -656,7 +656,8 @@ int mhi_arch_iommu_init(struct mhi_controller *mhi_cntrl)
	DOMAIN_ATTR_PAGE_TABLE_FORCE_COHERENT,		DOMAIN_ATTR_PAGE_TABLE_FORCE_COHERENT,
	&force_coherent);		&force_coherent);
	if (ret) {		if (ret) {
	MHI_ERR("Failed to set attribute FORCE_COHERENT\n");		MHI_CNTRL_ERR(
			"Failed to set attribute FORCE_COHERENT\n");
	goto release_mapping;		goto release_mapping;
	}		}
	}		}
	@@ -665,7 +666,7 @@ int mhi_arch_iommu_init(struct mhi_controller *mhi_cntrl)
	ret = arm_iommu_attach_device(&mhi_dev->pci_dev->dev, mapping);		ret = arm_iommu_attach_device(&mhi_dev->pci_dev->dev, mapping);

	if (ret) {		if (ret) {
	MHI_ERR("Error attach device, ret:%d\n", ret);		MHI_CNTRL_ERR("Error attach device, ret:%d\n", ret);
	goto release_mapping;		goto release_mapping;
	}		}
	arch_info->mapping = mapping;		arch_info->mapping = mapping;
	@@ -675,7 +676,7 @@ int mhi_arch_iommu_init(struct mhi_controller *mhi_cntrl)

	ret = dma_set_mask_and_coherent(mhi_cntrl->dev, DMA_BIT_MASK(64));		ret = dma_set_mask_and_coherent(mhi_cntrl->dev, DMA_BIT_MASK(64));
	if (ret) {		if (ret) {
	MHI_ERR("Error setting dma mask, ret:%d\n", ret);		MHI_CNTRL_ERR("Error setting dma mask, ret:%d\n", ret);
	goto release_device;		goto release_device;
	}		}

	@@ -711,7 +712,8 @@ int mhi_arch_link_suspend(struct mhi_controller *mhi_cntrl)
	struct pci_dev *pci_dev = mhi_dev->pci_dev;		struct pci_dev *pci_dev = mhi_dev->pci_dev;
	int ret = 0;		int ret = 0;

	MHI_LOG("Entered\n");		MHI_LOG("Entered with suspend_mode:%s\n",
			TO_MHI_SUSPEND_MODE_STR(mhi_dev->suspend_mode));

	/* disable inactivity timer */		/* disable inactivity timer */
	if (!mhi_dev->allow_m1)		if (!mhi_dev->allow_m1)
	@@ -722,7 +724,8 @@ int mhi_arch_link_suspend(struct mhi_controller *mhi_cntrl)
	pci_clear_master(pci_dev);		pci_clear_master(pci_dev);
	ret = pci_save_state(mhi_dev->pci_dev);		ret = pci_save_state(mhi_dev->pci_dev);
	if (ret) {		if (ret) {
	MHI_ERR("Failed with pci_save_state, ret:%d\n", ret);		MHI_CNTRL_ERR("Failed with pci_save_state, ret:%d\n",
			ret);
	goto exit_suspend;		goto exit_suspend;
	}		}

	@@ -739,6 +742,7 @@ int mhi_arch_link_suspend(struct mhi_controller *mhi_cntrl)
	case MHI_FAST_LINK_OFF:		case MHI_FAST_LINK_OFF:
	case MHI_ACTIVE_STATE:		case MHI_ACTIVE_STATE:
	case MHI_FAST_LINK_ON:/* keeping link on do nothing */		case MHI_FAST_LINK_ON:/* keeping link on do nothing */
			default:
	break;		break;
	}		}

	@@ -759,8 +763,6 @@ static int __mhi_arch_link_resume(struct mhi_controller *mhi_cntrl)
	struct mhi_link_info *cur_info = &mhi_cntrl->mhi_link_info;		struct mhi_link_info *cur_info = &mhi_cntrl->mhi_link_info;
	int ret;		int ret;

	MHI_LOG("Entered\n");

	/* request bus scale voting based on higher gen speed */		/* request bus scale voting based on higher gen speed */
	ret = mhi_arch_set_bus_request(mhi_cntrl,		ret = mhi_arch_set_bus_request(mhi_cntrl,
	cur_info->target_link_speed);		cur_info->target_link_speed);
	@@ -802,7 +804,8 @@ int mhi_arch_link_resume(struct mhi_controller *mhi_cntrl)
	struct pci_dev *pci_dev = mhi_dev->pci_dev;		struct pci_dev *pci_dev = mhi_dev->pci_dev;
	int ret = 0;		int ret = 0;

	MHI_LOG("Entered\n");		MHI_LOG("Entered with suspend_mode:%s\n",
			TO_MHI_SUSPEND_MODE_STR(mhi_dev->suspend_mode));

	switch (mhi_dev->suspend_mode) {		switch (mhi_dev->suspend_mode) {
	case MHI_DEFAULT_SUSPEND:		case MHI_DEFAULT_SUSPEND:
	@@ -811,6 +814,7 @@ int mhi_arch_link_resume(struct mhi_controller *mhi_cntrl)
	case MHI_FAST_LINK_OFF:		case MHI_FAST_LINK_OFF:
	case MHI_ACTIVE_STATE:		case MHI_ACTIVE_STATE:
	case MHI_FAST_LINK_ON:		case MHI_FAST_LINK_ON:
			default:
	break;		break;
	}		}

	@@ -822,9 +826,9 @@ int mhi_arch_link_resume(struct mhi_controller *mhi_cntrl)
	if (!mhi_dev->allow_m1)		if (!mhi_dev->allow_m1)
	msm_pcie_l1ss_timeout_enable(pci_dev);		msm_pcie_l1ss_timeout_enable(pci_dev);

	MHI_LOG("Exited\n");		MHI_LOG("Exited with ret:%d\n", ret);

	return 0;		return ret;
	}		}

	int mhi_arch_link_lpm_disable(struct mhi_controller *mhi_cntrl)		int mhi_arch_link_lpm_disable(struct mhi_controller *mhi_cntrl)

drivers/bus/mhi/controllers/mhi_qcom.c

+27 −15

Original line number	Original line	Diff line number	Diff line
	@@ -44,12 +44,19 @@ static const struct firmware_info firmware_table[] = {
	static int debug_mode;		static int debug_mode;
	module_param_named(debug_mode, debug_mode, int, 0644);		module_param_named(debug_mode, debug_mode, int, 0644);

			const char * const mhi_suspend_mode_str[MHI_SUSPEND_MODE_MAX] = {
			[MHI_ACTIVE_STATE] = "Active",
			[MHI_DEFAULT_SUSPEND] = "Default",
			[MHI_FAST_LINK_OFF] = "Fast Link Off",
			[MHI_FAST_LINK_ON] = "Fast Link On",
			};

	int mhi_debugfs_trigger_m0(void *data, u64 val)		int mhi_debugfs_trigger_m0(void *data, u64 val)
	{		{
	struct mhi_controller *mhi_cntrl = data;		struct mhi_controller *mhi_cntrl = data;
	struct mhi_dev *mhi_dev = mhi_controller_get_devdata(mhi_cntrl);		struct mhi_dev *mhi_dev = mhi_controller_get_devdata(mhi_cntrl);

	MHI_LOG("Trigger M3 Exit\n");		MHI_CNTRL_LOG("Trigger M3 Exit\n");
	pm_runtime_get(&mhi_dev->pci_dev->dev);		pm_runtime_get(&mhi_dev->pci_dev->dev);
	pm_runtime_put(&mhi_dev->pci_dev->dev);		pm_runtime_put(&mhi_dev->pci_dev->dev);

	@@ -63,7 +70,7 @@ int mhi_debugfs_trigger_m3(void *data, u64 val)
	struct mhi_controller *mhi_cntrl = data;		struct mhi_controller *mhi_cntrl = data;
	struct mhi_dev *mhi_dev = mhi_controller_get_devdata(mhi_cntrl);		struct mhi_dev *mhi_dev = mhi_controller_get_devdata(mhi_cntrl);

	MHI_LOG("Trigger M3 Entry\n");		MHI_CNTRL_LOG("Trigger M3 Entry\n");
	pm_runtime_mark_last_busy(&mhi_dev->pci_dev->dev);		pm_runtime_mark_last_busy(&mhi_dev->pci_dev->dev);
	pm_request_autosuspend(&mhi_dev->pci_dev->dev);		pm_request_autosuspend(&mhi_dev->pci_dev->dev);

	@@ -102,19 +109,19 @@ static int mhi_init_pci_dev(struct mhi_controller *mhi_cntrl)
	mhi_dev->resn = MHI_PCI_BAR_NUM;		mhi_dev->resn = MHI_PCI_BAR_NUM;
	ret = pci_assign_resource(pci_dev, mhi_dev->resn);		ret = pci_assign_resource(pci_dev, mhi_dev->resn);
	if (ret) {		if (ret) {
	MHI_ERR("Error assign pci resources, ret:%d\n", ret);		MHI_CNTRL_ERR("Error assign pci resources, ret:%d\n", ret);
	return ret;		return ret;
	}		}

	ret = pci_enable_device(pci_dev);		ret = pci_enable_device(pci_dev);
	if (ret) {		if (ret) {
	MHI_ERR("Error enabling device, ret:%d\n", ret);		MHI_CNTRL_ERR("Error enabling device, ret:%d\n", ret);
	goto error_enable_device;		goto error_enable_device;
	}		}

	ret = pci_request_region(pci_dev, mhi_dev->resn, "mhi");		ret = pci_request_region(pci_dev, mhi_dev->resn, "mhi");
	if (ret) {		if (ret) {
	MHI_ERR("Error pci_request_region, ret:%d\n", ret);		MHI_CNTRL_ERR("Error pci_request_region, ret:%d\n", ret);
	goto error_request_region;		goto error_request_region;
	}		}

	@@ -124,14 +131,14 @@ static int mhi_init_pci_dev(struct mhi_controller *mhi_cntrl)
	len = pci_resource_len(pci_dev, mhi_dev->resn);		len = pci_resource_len(pci_dev, mhi_dev->resn);
	mhi_cntrl->regs = ioremap_nocache(mhi_cntrl->base_addr, len);		mhi_cntrl->regs = ioremap_nocache(mhi_cntrl->base_addr, len);
	if (!mhi_cntrl->regs) {		if (!mhi_cntrl->regs) {
	MHI_ERR("Error ioremap region\n");		MHI_CNTRL_ERR("Error ioremap region\n");
	goto error_ioremap;		goto error_ioremap;
	}		}

	ret = pci_alloc_irq_vectors(pci_dev, mhi_cntrl->msi_required,		ret = pci_alloc_irq_vectors(pci_dev, mhi_cntrl->msi_required,
	mhi_cntrl->msi_required, PCI_IRQ_MSI);		mhi_cntrl->msi_required, PCI_IRQ_MSI);
	if (IS_ERR_VALUE((ulong)ret) \|\| ret < mhi_cntrl->msi_required) {		if (IS_ERR_VALUE((ulong)ret) \|\| ret < mhi_cntrl->msi_required) {
	MHI_ERR("Failed to enable MSI, ret:%d\n", ret);		MHI_CNTRL_ERR("Failed to enable MSI, ret:%d\n", ret);
	goto error_req_msi;		goto error_req_msi;
	}		}

	@@ -381,7 +388,7 @@ static int mhi_force_suspend(struct mhi_controller *mhi_cntrl)
	struct mhi_dev *mhi_dev = mhi_controller_get_devdata(mhi_cntrl);		struct mhi_dev *mhi_dev = mhi_controller_get_devdata(mhi_cntrl);
	int itr = DIV_ROUND_UP(mhi_cntrl->timeout_ms, delayms);		int itr = DIV_ROUND_UP(mhi_cntrl->timeout_ms, delayms);

	MHI_LOG("Entered\n");		MHI_CNTRL_LOG("Entered\n");

	mutex_lock(&mhi_cntrl->pm_mutex);		mutex_lock(&mhi_cntrl->pm_mutex);

	@@ -397,19 +404,19 @@ static int mhi_force_suspend(struct mhi_controller *mhi_cntrl)
	if (!ret \|\| ret != -EBUSY)		if (!ret \|\| ret != -EBUSY)
	break;		break;

	MHI_LOG("MHI busy, sleeping and retry\n");		MHI_CNTRL_LOG("MHI busy, sleeping and retry\n");
	msleep(delayms);		msleep(delayms);
	}		}

	if (ret)		if (ret) {
			MHI_CNTRL_ERR("Force suspend ret:%d\n", ret);
	goto exit_force_suspend;		goto exit_force_suspend;
			}

	mhi_dev->suspend_mode = MHI_DEFAULT_SUSPEND;		mhi_dev->suspend_mode = MHI_DEFAULT_SUSPEND;
	ret = mhi_arch_link_suspend(mhi_cntrl);		ret = mhi_arch_link_suspend(mhi_cntrl);

	exit_force_suspend:		exit_force_suspend:
	MHI_LOG("Force suspend ret with %d\n", ret);

	mutex_unlock(&mhi_cntrl->pm_mutex);		mutex_unlock(&mhi_cntrl->pm_mutex);

	return ret;		return ret;
	@@ -541,13 +548,15 @@ static void mhi_status_cb(struct mhi_controller *mhi_cntrl,
	*/		*/
	pm_runtime_get(dev);		pm_runtime_get(dev);
	ret = mhi_force_suspend(mhi_cntrl);		ret = mhi_force_suspend(mhi_cntrl);
	if (!ret)		if (!ret) {
			MHI_CNTRL_LOG("Attempt resume after forced suspend\n");
	mhi_runtime_resume(dev);		mhi_runtime_resume(dev);
			}
	pm_runtime_put(dev);		pm_runtime_put(dev);
	mhi_arch_mission_mode_enter(mhi_cntrl);		mhi_arch_mission_mode_enter(mhi_cntrl);
	break;		break;
	default:		default:
	MHI_ERR("Unhandled cb:0x%x\n", reason);		MHI_CNTRL_LOG("Unhandled cb:0x%x\n", reason);
	}		}
	}		}

	@@ -773,6 +782,9 @@ static struct mhi_controller mhi_register_controller(struct pci_dev pci_dev)
	atomic_set(&mhi_cntrl->write_idx, -1);		atomic_set(&mhi_cntrl->write_idx, -1);

	skip_offload:		skip_offload:
			if (sysfs_create_group(&mhi_cntrl->mhi_dev->dev.kobj, &mhi_qcom_group))
			MHI_CNTRL_ERR("Error while creating the sysfs group\n");

	return mhi_cntrl;		return mhi_cntrl;

	error_free_wq:		error_free_wq:
	@@ -826,7 +838,7 @@ int mhi_pci_probe(struct pci_dev *pci_dev,

	pm_runtime_mark_last_busy(&pci_dev->dev);		pm_runtime_mark_last_busy(&pci_dev->dev);

	MHI_LOG("Return successful\n");		MHI_CNTRL_LOG("Return successful\n");

	return 0;		return 0;

drivers/bus/mhi/controllers/mhi_qcom.h

+4 −1

Original line number	Original line	Diff line number	Diff line
	@@ -48,9 +48,12 @@ enum mhi_suspend_mode {
	MHI_DEFAULT_SUSPEND,		MHI_DEFAULT_SUSPEND,
	MHI_FAST_LINK_OFF,		MHI_FAST_LINK_OFF,
	MHI_FAST_LINK_ON,		MHI_FAST_LINK_ON,
			MHI_SUSPEND_MODE_MAX,
	};		};

	#define MHI_IS_SUSPENDED(mode) (mode)		extern const char * const mhi_suspend_mode_str[MHI_SUSPEND_MODE_MAX];
			#define TO_MHI_SUSPEND_MODE_STR(mode) \
			(mode >= MHI_SUSPEND_MODE_MAX ? "Invalid" : mhi_suspend_mode_str[mode])

	struct mhi_dev {		struct mhi_dev {
	struct pci_dev *pci_dev;		struct pci_dev *pci_dev;