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Commit f290216b authored by Siddartha Mohanadoss's avatar Siddartha Mohanadoss
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msm: mhi_dev: Fix clearing control interrupt 



Update mask to clear the control interrupt including
the doorbell write interrupt. Without clearing this
interrupt it shows up as pending when restoring the
MHI registers as part of transition from D3 state to D0.

Change-Id: I3110ddf2c8500af54656dc80b71718288ecdb4c1
Signed-off-by: default avatarSiddartha Mohanadoss <smohanad@codeaurora.org>
parent 4b5c3904

drivers/platform/msm/mhi_dev/mhi_hwio.h

+1 −0
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@ 
#define MHI_CTRL_INT_CLEAR_A7				(0x004C)

#define MHI_CTRL_INT_CLEAR_A7_CLEAR_MASK		0xffffffff

#define MHI_CTRL_INT_CLEAR_A7_CLEAR_SHIFT		0x0

#define MHI_CTRL_INT_MMIO_WR_CLEAR			BIT(2)

#define MHI_CTRL_INT_CRDB_CLEAR				BIT(1)

#define MHI_CTRL_INT_CRDB_MHICTRL_CLEAR			BIT(0)

drivers/platform/msm/mhi_dev/mhi_mmio.c

+2 −1
Original line number Diff line number Diff line
@@ -420,7 +420,8 @@ int mhi_dev_mmio_clear_interrupts(struct mhi_dev *dev) 
				MHI_ERDB_INT_CLEAR_A7_n_CLEAR_MASK);



	mhi_dev_mmio_write(dev, MHI_CTRL_INT_CLEAR_A7,

					MHI_CTRL_INT_CRDB_CLEAR);

		(MHI_CTRL_INT_MMIO_WR_CLEAR | MHI_CTRL_INT_CRDB_CLEAR |

		MHI_CTRL_INT_CRDB_MHICTRL_CLEAR));



	return 0;

}