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Commit f20d9cb7 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Enable PDC support for VM targets"

parents 9ae8cec1 0c256bff

arch/arm64/boot/dts/qcom/sa6155p-vm.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -204,6 +204,14 @@ 
		};

	};



	pdc: interrupt-controller@0xb220000{

		compatible = "qcom,pdc-virt";

		reg = <0xb220000 0x400>;

		#interrupt-cells = <3>;

		interrupt-controller;

		qcom,pdc-pins = <8 520>, <9 521>, <10 522>, <11 523>;

	};



	apps_smmu: apps-smmu@0x15000000 {

		compatible = "qcom,qsmmu-v500";

		reg = <0x15000000 0x80000>,

arch/arm64/boot/dts/qcom/sa8155-vm.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -127,6 +127,14 @@ 
		reg = <0xeb600000 0x1000>;

	};



	pdc: interrupt-controller@0xb220000{

		compatible = "qcom,pdc-virt";

		reg = <0xb220000 0x400>;

		#interrupt-cells = <3>;

		interrupt-controller;

		qcom,pdc-pins = <7 519>, <8 520>, <9 521>, <10 522>, <11 523>;

	};



	clock_virt: qcom,virtio-gcc {

		compatible = "virtio,mmio";

		reg = <0x1c200000 0x1000>;

arch/arm64/boot/dts/qcom/sa8195-vm.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -30,6 +30,14 @@ 
};



&soc {

	pdc: interrupt-controller@0xb220000{

		compatible = "qcom,pdc-virt";

		reg = <0xb220000 0x400>;

		#interrupt-cells = <3>;

		interrupt-controller;

		qcom,pdc-pins = <7 519>, <8 520>, <9 521>, <10 522>, <11 523>;

	};



	clock_virt: qcom,virtio-gcc {

		compatible = "virtio,mmio";

		reg = <0x1c200000 0x1000>;