Loading drivers/gpu/drm/msm/sde/sde_hw_catalog.c +57 −2 Original line number Diff line number Diff line Loading @@ -83,6 +83,17 @@ #define LINE_LM_OFFSET 5 #define LINE_MODE_WB_OFFSET 2 /** * these configurations are decided based on max mdp clock. It accounts * for max and min display resolution based on virtual hardware resource * support. */ #define MAX_DISPLAY_HEIGHT_WITH_DECIMATION 2160 #define MAX_DISPLAY_HEIGHT 5120 #define MIN_DISPLAY_HEIGHT 0 #define MIN_DISPLAY_WIDTH 0 #define MAX_LM_PER_DISPLAY 2 /* maximum XIN halt timeout in usec */ #define VBIF_XIN_HALT_TIMEOUT 0x4000 Loading Loading @@ -3487,7 +3498,7 @@ static int sde_hardware_format_caps(struct sde_mdss_cfg *sde_cfg, return rc; } static int _sde_hardware_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev) static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev) { int rc = 0; Loading Loading @@ -3527,6 +3538,46 @@ static int _sde_hardware_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev) return rc; } static int _sde_hardware_post_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev) { int rc = 0, i; u32 max_horz_deci = 0, max_vert_deci = 0; if (!sde_cfg) return -EINVAL; for (i = 0; i < sde_cfg->sspp_count; i++) { if (sde_cfg->sspp[i].sblk) { max_horz_deci = max(max_horz_deci, sde_cfg->sspp[i].sblk->maxhdeciexp); max_vert_deci = max(max_vert_deci, sde_cfg->sspp[i].sblk->maxvdeciexp); } } /* this should be updated based on HW rev in future */ sde_cfg->max_lm_per_display = MAX_LM_PER_DISPLAY; if (max_horz_deci) sde_cfg->max_display_width = sde_cfg->max_sspp_linewidth * max_horz_deci; else sde_cfg->max_display_width = sde_cfg->max_mixer_width * sde_cfg->max_lm_per_display; if (max_vert_deci) sde_cfg->max_display_height = MAX_DISPLAY_HEIGHT_WITH_DECIMATION * max_vert_deci; else sde_cfg->max_display_height = MAX_DISPLAY_HEIGHT; sde_cfg->min_display_height = MIN_DISPLAY_HEIGHT; sde_cfg->min_display_width = MIN_DISPLAY_WIDTH; return rc; } void sde_hw_catalog_deinit(struct sde_mdss_cfg *sde_cfg) { int i; Loading Loading @@ -3586,7 +3637,7 @@ struct sde_mdss_cfg *sde_hw_catalog_init(struct drm_device *dev, u32 hw_rev) sde_cfg->hwversion = hw_rev; rc = _sde_hardware_caps(sde_cfg, hw_rev); rc = _sde_hardware_pre_caps(sde_cfg, hw_rev); if (rc) goto end; Loading Loading @@ -3662,6 +3713,10 @@ struct sde_mdss_cfg *sde_hw_catalog_init(struct drm_device *dev, u32 hw_rev) if (rc) goto end; rc = _sde_hardware_post_caps(sde_cfg, hw_rev); if (rc) goto end; return sde_cfg; end: Loading drivers/gpu/drm/msm/sde/sde_hw_catalog.h +12 −0 Original line number Diff line number Diff line Loading @@ -1004,6 +1004,11 @@ struct sde_perf_cfg { * @max_mixer_blendstages max layer mixer blend stages or * supported z order * @max_wb_linewidth max writeback line width support. * @max_display_width maximum display width support. * @max_display_height maximum display height support. * @max_lm_per_display maximum layer mixer per display * @min_display_width minimum display width support. * @min_display_height minimum display height support. * @qseed_type qseed2 or qseed3 support. * @csc_type csc or csc_10bit support. * @smart_dma_rev Supported version of SmartDMA feature. Loading Loading @@ -1036,6 +1041,13 @@ struct sde_mdss_cfg { u32 max_mixer_width; u32 max_mixer_blendstages; u32 max_wb_linewidth; u32 max_display_width; u32 max_display_height; u32 min_display_width; u32 min_display_height; u32 max_lm_per_display; u32 qseed_type; u32 csc_type; u32 smart_dma_rev; Loading drivers/gpu/drm/msm/sde/sde_kms.c +4 −9 Original line number Diff line number Diff line Loading @@ -2751,15 +2751,10 @@ static int sde_kms_hw_init(struct msm_kms *kms) goto drm_obj_init_err; } dev->mode_config.min_width = 0; dev->mode_config.min_height = 0; /* * max crtc width is equal to the max mixer width * 2 and max height is * is 4K */ dev->mode_config.max_width = sde_kms->catalog->max_mixer_width * 2; dev->mode_config.max_height = 4096; dev->mode_config.min_width = sde_kms->catalog->min_display_width; dev->mode_config.min_height = sde_kms->catalog->min_display_height; dev->mode_config.max_width = sde_kms->catalog->max_display_width; dev->mode_config.max_height = sde_kms->catalog->max_display_height; /* * Support format modifiers for compression etc. Loading Loading
drivers/gpu/drm/msm/sde/sde_hw_catalog.c +57 −2 Original line number Diff line number Diff line Loading @@ -83,6 +83,17 @@ #define LINE_LM_OFFSET 5 #define LINE_MODE_WB_OFFSET 2 /** * these configurations are decided based on max mdp clock. It accounts * for max and min display resolution based on virtual hardware resource * support. */ #define MAX_DISPLAY_HEIGHT_WITH_DECIMATION 2160 #define MAX_DISPLAY_HEIGHT 5120 #define MIN_DISPLAY_HEIGHT 0 #define MIN_DISPLAY_WIDTH 0 #define MAX_LM_PER_DISPLAY 2 /* maximum XIN halt timeout in usec */ #define VBIF_XIN_HALT_TIMEOUT 0x4000 Loading Loading @@ -3487,7 +3498,7 @@ static int sde_hardware_format_caps(struct sde_mdss_cfg *sde_cfg, return rc; } static int _sde_hardware_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev) static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev) { int rc = 0; Loading Loading @@ -3527,6 +3538,46 @@ static int _sde_hardware_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev) return rc; } static int _sde_hardware_post_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev) { int rc = 0, i; u32 max_horz_deci = 0, max_vert_deci = 0; if (!sde_cfg) return -EINVAL; for (i = 0; i < sde_cfg->sspp_count; i++) { if (sde_cfg->sspp[i].sblk) { max_horz_deci = max(max_horz_deci, sde_cfg->sspp[i].sblk->maxhdeciexp); max_vert_deci = max(max_vert_deci, sde_cfg->sspp[i].sblk->maxvdeciexp); } } /* this should be updated based on HW rev in future */ sde_cfg->max_lm_per_display = MAX_LM_PER_DISPLAY; if (max_horz_deci) sde_cfg->max_display_width = sde_cfg->max_sspp_linewidth * max_horz_deci; else sde_cfg->max_display_width = sde_cfg->max_mixer_width * sde_cfg->max_lm_per_display; if (max_vert_deci) sde_cfg->max_display_height = MAX_DISPLAY_HEIGHT_WITH_DECIMATION * max_vert_deci; else sde_cfg->max_display_height = MAX_DISPLAY_HEIGHT; sde_cfg->min_display_height = MIN_DISPLAY_HEIGHT; sde_cfg->min_display_width = MIN_DISPLAY_WIDTH; return rc; } void sde_hw_catalog_deinit(struct sde_mdss_cfg *sde_cfg) { int i; Loading Loading @@ -3586,7 +3637,7 @@ struct sde_mdss_cfg *sde_hw_catalog_init(struct drm_device *dev, u32 hw_rev) sde_cfg->hwversion = hw_rev; rc = _sde_hardware_caps(sde_cfg, hw_rev); rc = _sde_hardware_pre_caps(sde_cfg, hw_rev); if (rc) goto end; Loading Loading @@ -3662,6 +3713,10 @@ struct sde_mdss_cfg *sde_hw_catalog_init(struct drm_device *dev, u32 hw_rev) if (rc) goto end; rc = _sde_hardware_post_caps(sde_cfg, hw_rev); if (rc) goto end; return sde_cfg; end: Loading
drivers/gpu/drm/msm/sde/sde_hw_catalog.h +12 −0 Original line number Diff line number Diff line Loading @@ -1004,6 +1004,11 @@ struct sde_perf_cfg { * @max_mixer_blendstages max layer mixer blend stages or * supported z order * @max_wb_linewidth max writeback line width support. * @max_display_width maximum display width support. * @max_display_height maximum display height support. * @max_lm_per_display maximum layer mixer per display * @min_display_width minimum display width support. * @min_display_height minimum display height support. * @qseed_type qseed2 or qseed3 support. * @csc_type csc or csc_10bit support. * @smart_dma_rev Supported version of SmartDMA feature. Loading Loading @@ -1036,6 +1041,13 @@ struct sde_mdss_cfg { u32 max_mixer_width; u32 max_mixer_blendstages; u32 max_wb_linewidth; u32 max_display_width; u32 max_display_height; u32 min_display_width; u32 min_display_height; u32 max_lm_per_display; u32 qseed_type; u32 csc_type; u32 smart_dma_rev; Loading
drivers/gpu/drm/msm/sde/sde_kms.c +4 −9 Original line number Diff line number Diff line Loading @@ -2751,15 +2751,10 @@ static int sde_kms_hw_init(struct msm_kms *kms) goto drm_obj_init_err; } dev->mode_config.min_width = 0; dev->mode_config.min_height = 0; /* * max crtc width is equal to the max mixer width * 2 and max height is * is 4K */ dev->mode_config.max_width = sde_kms->catalog->max_mixer_width * 2; dev->mode_config.max_height = 4096; dev->mode_config.min_width = sde_kms->catalog->min_display_width; dev->mode_config.min_height = sde_kms->catalog->min_display_height; dev->mode_config.max_width = sde_kms->catalog->max_display_width; dev->mode_config.max_height = sde_kms->catalog->max_display_height; /* * Support format modifiers for compression etc. Loading