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Commit e6e4e70c authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "msm: kgsl: Get gx status on demand instead through arguments"

parents 11c5d50a 0452c278
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+33 −24
Original line number Diff line number Diff line
@@ -1691,21 +1691,33 @@ static inline const char *_kgsl_context_comm(struct kgsl_context *context)

static void adreno_fault_header(struct kgsl_device *device,
		struct adreno_ringbuffer *rb, struct kgsl_drawobj_cmd *cmdobj,
		int fault, bool gx_on)
		int fault)
{
	struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
	struct kgsl_drawobj *drawobj = DRAWOBJ(cmdobj);
	struct adreno_context *drawctxt =
			drawobj ? ADRENO_CONTEXT(drawobj->context) : NULL;
	struct gmu_dev_ops *gmu_dev_ops = GMU_DEVICE_OPS(device);
	unsigned int status, rptr, wptr, ib1sz, ib2sz;
	uint64_t ib1base, ib2base;
	bool gx_on = true;
	int id = (rb != NULL) ? rb->id : -1;
	const char *type = fault & ADRENO_GMU_FAULT ? "gmu" : "gpu";

	if (GMU_DEV_OP_VALID(gmu_dev_ops, gx_is_on))
		gx_on = gmu_dev_ops->gx_is_on(adreno_dev);

	/*
	 * GPU registers can't be accessed if the gx headswitch is off.
	 * During the gx off case access to GPU gx blocks will show data
	 * as 0x5c00bd00. Hence skip adreno fault header dump.
	 */
	if (!gx_on) {
		dev_err(device->dev, "%s fault and gx is off\n",
				fault & ADRENO_GMU_FAULT ? "GMU" : "GPU");
		if (drawobj != NULL)
			pr_fault(device, drawobj,
				"%s fault ctx %d ctx_type %s ts %d and GX is OFF\n",
				type, drawobj->context->id,
				get_api_type_str(drawctxt->type),
				drawobj->timestamp);
		else
			dev_err(device->dev, "RB[%d] : %s fault and GX is OFF\n",
				id, type);

		return;
	}

@@ -1720,9 +1732,6 @@ static void adreno_fault_header(struct kgsl_device *device,
	adreno_readreg(adreno_dev, ADRENO_REG_CP_IB2_BUFSZ, &ib2sz);

	if (drawobj != NULL) {
		struct adreno_context *drawctxt =
			ADRENO_CONTEXT(drawobj->context);

		drawctxt->base.total_fault_count++;
		drawctxt->base.last_faulted_cmd_ts = drawobj->timestamp;

@@ -1732,26 +1741,27 @@ static void adreno_fault_header(struct kgsl_device *device,
			ib2base, ib2sz, drawctxt->rb->id);

		pr_fault(device, drawobj,
			"gpu fault ctx %d ctx_type %s ts %d status %8.8X rb %4.4x/%4.4x ib1 %16.16llX/%4.4x ib2 %16.16llX/%4.4x\n",
			drawobj->context->id, get_api_type_str(drawctxt->type),
			"%s fault ctx %d ctx_type %s ts %d status %8.8X rb %4.4x/%4.4x ib1 %16.16llX/%4.4x ib2 %16.16llX/%4.4x\n",
			type, drawobj->context->id,
			get_api_type_str(drawctxt->type),
			drawobj->timestamp, status,
			rptr, wptr, ib1base, ib1sz, ib2base, ib2sz);

		if (rb != NULL)
			pr_fault(device, drawobj,
				"gpu fault rb %d rb sw r/w %4.4x/%4.4x\n",
				rb->id, rptr, rb->wptr);
				"%s fault rb %d rb sw r/w %4.4x/%4.4x\n",
				type, rb->id, rptr, rb->wptr);
	} else {
		int id = (rb != NULL) ? rb->id : -1;

		dev_err(device->dev,
			"RB[%d]: gpu fault status %8.8X rb %4.4x/%4.4x ib1 %16.16llX/%4.4x ib2 %16.16llX/%4.4x\n",
			id, status, rptr, wptr, ib1base, ib1sz, ib2base,
			"RB[%d]: %s fault status %8.8X rb %4.4x/%4.4x ib1 %16.16llX/%4.4x ib2 %16.16llX/%4.4x\n",
			id, type, status, rptr, wptr, ib1base, ib1sz, ib2base,
			ib2sz);
		if (rb != NULL)
			dev_err(device->dev,
				"RB[%d] gpu fault rb sw r/w %4.4x/%4.4x\n",
				rb->id, rptr, rb->wptr);
				"RB[%d] %s fault rb sw r/w %4.4x/%4.4x\n",
				rb->id, type, rptr, rb->wptr);
	}
}

@@ -2067,14 +2077,13 @@ static void recover_dispatch_q(struct kgsl_device *device,
}

static void do_header_and_snapshot(struct kgsl_device *device, int fault,
		struct adreno_ringbuffer *rb, struct kgsl_drawobj_cmd *cmdobj,
		bool gx_on)
		struct adreno_ringbuffer *rb, struct kgsl_drawobj_cmd *cmdobj)
{
	struct kgsl_drawobj *drawobj = DRAWOBJ(cmdobj);

	/* Always dump the snapshot on a non-drawobj failure */
	if (cmdobj == NULL) {
		adreno_fault_header(device, rb, NULL, fault, gx_on);
		adreno_fault_header(device, rb, NULL, fault);
		kgsl_device_snapshot(device, NULL, fault & ADRENO_GMU_FAULT);
		return;
	}
@@ -2084,7 +2093,7 @@ static void do_header_and_snapshot(struct kgsl_device *device, int fault,
		return;

	/* Print the fault header */
	adreno_fault_header(device, rb, cmdobj, fault, gx_on);
	adreno_fault_header(device, rb, cmdobj, fault);

	if (!(drawobj->context->flags & KGSL_CONTEXT_NO_SNAPSHOT))
		kgsl_device_snapshot(device, drawobj->context,
@@ -2212,7 +2221,7 @@ static int dispatcher_do_fault(struct adreno_device *adreno_dev)
		adreno_readreg64(adreno_dev, ADRENO_REG_CP_IB1_BASE,
			ADRENO_REG_CP_IB1_BASE_HI, &base);

	do_header_and_snapshot(device, fault, hung_rb, cmdobj, gx_on);
	do_header_and_snapshot(device, fault, hung_rb, cmdobj);

	/* Turn off the KEEPALIVE vote from the ISR for hard fault */
	if (gpudev->gpu_keepalive && fault & ADRENO_HARD_FAULT)