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Commit e2bc96ae authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-intel-fixes' of... 

Merge branch 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/drm-intel into HEAD

* 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/drm-intel:
  drm/i915: Remove use of the autoreported ringbuffer HEAD position
  drm/i915: Prevent a machine hang by checking crtc->active before loading lut
  drm/i915: fix operator precedence when enabling RC6p
  drm/i915: fix a sprite watermark computation to avoid divide by zero if xpos<0
  drm/i915: fix mode set on load pipe. (v2)
parents 500dd237 5d031e5b

drivers/gpu/drm/i915/intel_display.c

+12 −3
Original line number Diff line number Diff line
@@ -4680,8 +4680,17 @@ sandybridge_compute_sprite_srwm(struct drm_device *dev, int plane, 


	crtc = intel_get_crtc_for_plane(dev, plane);

	clock = crtc->mode.clock;

	if (!clock) {

		*sprite_wm = 0;

		return false;

	}



	line_time_us = (sprite_width * 1000) / clock;

	if (!line_time_us) {

		*sprite_wm = 0;

		return false;

	}



	line_count = (latency_ns / line_time_us + 1000) / 1000;

	line_size = sprite_width * pixel_size;
@@ -6175,7 +6184,7 @@ void intel_crtc_load_lut(struct drm_crtc *crtc) 
	int i;



	/* The clocks have to be on to load the palette. */

	if (!crtc->enabled)

	if (!crtc->enabled || !intel_crtc->active)

		return;



	/* use legacy palette for Ironlake */
@@ -6561,7 +6570,7 @@ intel_framebuffer_create_for_mode(struct drm_device *dev, 
	mode_cmd.height = mode->vdisplay;

	mode_cmd.pitches[0] = intel_framebuffer_pitch_for_width(mode_cmd.width,

								bpp);

	mode_cmd.pixel_format = 0;

	mode_cmd.pixel_format = drm_mode_legacy_fb_format(bpp, depth);



	return intel_framebuffer_create(dev, &mode_cmd, obj);

}
@@ -8185,7 +8194,7 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv) 


	if (intel_enable_rc6(dev_priv->dev))

		rc6_mask = GEN6_RC_CTL_RC6_ENABLE |

			(IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0;

			((IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0);



	I915_WRITE(GEN6_RC_CONTROL,

		   rc6_mask |

drivers/gpu/drm/i915/intel_ringbuffer.c

+1 −13
Original line number Diff line number Diff line
@@ -301,7 +301,7 @@ static int init_ring_common(struct intel_ring_buffer *ring) 


	I915_WRITE_CTL(ring,

			((ring->size - PAGE_SIZE) & RING_NR_PAGES)

			| RING_REPORT_64K | RING_VALID);

			| RING_VALID);



	/* If the head is still not zero, the ring is dead */

	if ((I915_READ_CTL(ring) & RING_VALID) == 0 ||
@@ -1132,18 +1132,6 @@ int intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n) 
	struct drm_device *dev = ring->dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	unsigned long end;

	u32 head;



	/* If the reported head position has wrapped or hasn't advanced,

	 * fallback to the slow and accurate path.

	 */

	head = intel_read_status_page(ring, 4);

	if (head > ring->head) {

		ring->head = head;

		ring->space = ring_space(ring);

		if (ring->space >= n)

			return 0;

	}



	trace_i915_ring_wait_begin(ring);

	if (drm_core_check_feature(dev, DRIVER_GEM))