Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit de7d6c3e authored by Sonny Rao's avatar Sonny Rao Committed by Heiko Stuebner
Browse files

clk: rockchip: fix parent for spdif_8ch_frac on rk3288 



The parent should be spdif_8ch_pre not spdif_8ch_src, which doesn't
exist and looks to be a typo.  The TRM also confirms this.

Signed-off-by: default avatarSonny Rao <sonnyrao@chromium.org>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent f114040e

drivers/clk/rockchip/clk-rk3288.c

+1 −1
Original line number Diff line number Diff line
@@ -325,7 +325,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = { 
	COMPOSITE_NOMUX(0, "spdif_8ch_pre", "spdif_src", 0,

			RK3288_CLKSEL_CON(40), 0, 7, DFLAGS,

			RK3288_CLKGATE_CON(4), 7, GFLAGS),

	COMPOSITE_FRAC(0, "spdif_8ch_frac", "spdif_8ch_src", 0,

	COMPOSITE_FRAC(0, "spdif_8ch_frac", "spdif_8ch_pre", 0,

			RK3288_CLKSEL_CON(41), 0,

			RK3288_CLKGATE_CON(4), 8, GFLAGS),

	COMPOSITE_NODIV(SCLK_SPDIF8CH, "sclk_spdif_8ch", mux_spdif_8ch_p, 0,