ARM: dts: msm: Add svs clock entries for csiphy

Add svs clock entries for csiphy in sdm7150 target. This clock level
allows to reduce the power consumed by csi phy. The clock source
"clock rate of cphy_rx_clk_src" will run at 384MHz instead of
400MHz (svs_l1).

Change-Id: Idd8f6f92f289c95e118128d9a6aa725d621d2d17
Signed-off-by: Tony Lijo Jose <tjose@codeaurora.org>