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Commit db9d36b3 authored by Taniya Das's avatar Taniya Das Committed by Gerrit - the friendly Code Review server
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clk: qcom: camcc: Add support for 400MHz for FD Core Clock 



Support 400Mhz clock for fd core clock for sdmmagpie.

Change-Id: If865db7bea5572fd31b7883678278327101d9062
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent d519a334

drivers/clk/qcom/camcc-sdmmagpie.c

+2 −1
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2018, The Linux Foundation. All rights reserved.

 * Copyright (c) 2018, 2021, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -689,6 +689,7 @@ static const struct freq_tbl ftbl_cam_cc_fd_core_clk_src[] = { 
	F(19200000, P_BI_TCXO, 1, 0, 0),

	F(380000000, P_CAM_CC_PLL4_OUT_EVEN, 1, 0, 0),

	F(384000000, P_CAM_CC_PLL2_OUT_EARLY, 2.5, 0, 0),

	F(400000000, P_CAM_CC_PLL0_OUT_MAIN, 3, 0, 0),

	F(480000000, P_CAM_CC_PLL2_OUT_EARLY, 2, 0, 0),

	F(600000000, P_CAM_CC_PLL0_OUT_MAIN, 2, 0, 0),

	{ }