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Commit cd40741d authored by Anirudh Ghayal's avatar Anirudh Ghayal Committed by Shilpa Suresh
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power: qpnp-fg-gen3: Disable FG during TWM entry



To save power disable FG during TWM entry. Identify
TWM entry via the TWM notifier and disable FG in the
shutdown callback if TWM entry is requested.

Add a DT property "qcom,fg-disable-in-twm" to enable
this feature.

Change-Id: I6eaea1838d3ad9161fd0529c79dd528f5d4bcbe0
Signed-off-by: default avatarAnirudh Ghayal <aghayal@codeaurora.org>
parent 70d3a84c
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+5 −0
Original line number Diff line number Diff line
@@ -463,6 +463,11 @@ First Level Node - FG Gen3 device
	Value type: <u32>
	Definition: The minimum battery current for FG to enter into sync-sleep.

- qcom,fg-disable-in-twm
	Usage:      optional
	Value type: <empty>
	Definition: A boolean property which disables FG during TWM entry.

==========================================================
Second Level Nodes - Peripherals managed by FG Gen3 driver
==========================================================
+2 −0
Original line number Diff line number Diff line
@@ -451,6 +451,7 @@ struct fg_dev {
	struct fg_batt_props	bp;
	struct notifier_block	nb;
	struct alarm            esr_sw_timer;
	struct notifier_block	twm_nb;
	struct mutex		bus_lock;
	struct mutex		sram_rw_lock;
	struct mutex		charge_full_lock;
@@ -488,6 +489,7 @@ struct fg_dev {
	bool			soc_reporting_ready;
	bool			use_ima_single_mode;
	bool			usb_present;
	bool			twm_state;
	bool			use_dma;
	bool			qnovo_enable;
	enum fg_version		version;
+6 −1
Original line number Diff line number Diff line
/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
/* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
@@ -53,6 +53,7 @@
#define BATT_SOC_SLEEP_SHUTDOWN_STS(chip)	(chip->batt_soc_base + 0x08)
#define BATT_SOC_FG_MONOTONIC_SOC(chip)		(chip->batt_soc_base + 0x09)
#define BATT_SOC_FG_MONOTONIC_SOC_CP(chip)	(chip->batt_soc_base + 0x0A)
#define BATT_SOC_RST_CTRL0(chip)		(chip->batt_soc_base + 0xBA)

#define BATT_SOC_INT_RT_STS(chip)		(chip->batt_soc_base + 0x10)
#define SOC_READY_BIT				BIT(1)
@@ -67,6 +68,10 @@
#define BATT_SOC_STS_CLR(chip)			(chip->batt_soc_base + 0x4A)
#define BATT_SOC_LOW_PWR_CFG(chip)		(chip->batt_soc_base + 0x52)
#define BATT_SOC_LOW_PWR_STS(chip)		(chip->batt_soc_base + 0x56)
/* BATT_SOC_RST_CTRL0 */
#define BCL_RST_BIT				BIT(2)
#define MEM_RST_BIT				BIT(1)
#define ALG_RST_BIT				BIT(0)

/* FG_BATT_INFO register definitions */
#define BATT_INFO_BATT_TEMP_STS(chip)		(chip->batt_info_base + 0x06)
+1 −1
Original line number Diff line number Diff line
@@ -722,7 +722,7 @@ static inline bool is_sec_access(struct fg_dev *fg, int addr)
	if (fg->version != GEN3_FG)
		return false;

	return ((addr & 0x00FF) > 0xD0);
	return ((addr & 0x00FF) > 0xB8);
}

int fg_write(struct fg_dev *fg, int addr, u8 *val, int len)
+40 −0
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@
#include <linux/platform_device.h>
#include <linux/iio/consumer.h>
#include <linux/qpnp/qpnp-revid.h>
#include <linux/qpnp/qpnp-misc.h>
#include "fg-core.h"
#include "fg-reg.h"

@@ -170,6 +171,7 @@ struct fg_dt_props {
	bool	auto_recharge_soc;
	bool    use_esr_sw;
	bool	disable_esr_pull_dn;
	bool    disable_fg_twm;
	int	cutoff_volt_mv;
	int	empty_volt_mv;
	int	vbatt_low_thr_mv;
@@ -3843,6 +3845,22 @@ static int fg_notifier_cb(struct notifier_block *nb,
	return NOTIFY_OK;
}

static int twm_notifier_cb(struct notifier_block *nb,
				unsigned long action, void *data)
{
	struct fg_dev *fg = container_of(nb, struct fg_dev, twm_nb);

	if (action != PMIC_TWM_CLEAR &&
			action != PMIC_TWM_ENABLE) {
		pr_debug("Unsupported option %lu\n", action);
		return NOTIFY_OK;
	}

	fg->twm_state = (u8)action;

	return NOTIFY_OK;
}

static enum power_supply_property fg_psy_props[] = {
	POWER_SUPPLY_PROP_CAPACITY,
	POWER_SUPPLY_PROP_CAPACITY_RAW,
@@ -5070,6 +5088,9 @@ static int fg_parse_dt(struct fg_gen3_chip *chip)
	chip->dt.disable_esr_pull_dn = of_property_read_bool(node,
					"qcom,fg-disable-esr-pull-dn");

	chip->dt.disable_fg_twm = of_property_read_bool(node,
					"qcom,fg-disable-in-twm");

	return 0;
}

@@ -5260,6 +5281,11 @@ static int fg_gen3_probe(struct platform_device *pdev)
		goto exit;
	}

	fg->twm_nb.notifier_call = twm_notifier_cb;
	rc = qpnp_misc_twm_notifier_register(&fg->twm_nb);
	if (rc < 0)
		pr_err("Failed to register twm_notifier_cb rc=%d\n", rc);

	rc = fg_register_interrupts(&chip->fg, FG_GEN3_IRQ_MAX);
	if (rc < 0) {
		dev_err(fg->dev, "Error in registering interrupts, rc:%d\n",
@@ -5374,6 +5400,7 @@ static void fg_gen3_shutdown(struct platform_device *pdev)
	struct fg_gen3_chip *chip = dev_get_drvdata(&pdev->dev);
	struct fg_dev *fg = &chip->fg;
	int rc, bsoc;
	u8 mask;

	if (fg->charge_full) {
		rc = fg_get_sram_prop(fg, FG_SRAM_BATT_SOC, &bsoc);
@@ -5397,6 +5424,19 @@ static void fg_gen3_shutdown(struct platform_device *pdev)
	if (rc < 0)
		pr_err("Error in setting ESR timer at shutdown, rc=%d\n", rc);

	if (fg->twm_state == PMIC_TWM_ENABLE && chip->dt.disable_fg_twm) {
		rc = fg_masked_write(fg, BATT_SOC_EN_CTL(fg),
					FG_ALGORITHM_EN_BIT, 0);
		if (rc < 0)
			pr_err("Error in disabling FG rc=%d\n", rc);

		mask = BCL_RST_BIT | MEM_RST_BIT | ALG_RST_BIT;
		rc = fg_masked_write(fg, BATT_SOC_RST_CTRL0(fg),
					mask, mask);
		if (rc < 0)
			pr_err("Error in disabling FG resets rc=%d\n", rc);
	}

	fg_cleanup(chip);
}