Loading arch/arm64/boot/dts/qcom/sm8150-marmot.dtsi +32 −0 Original line number Diff line number Diff line Loading @@ -276,3 +276,35 @@ }; }; }; &pil_modem_mem { reg = <0x0 0x8d800000 0x0 0x3200000>; }; &pil_video_mem { reg = <0x0 0x90a00000 0x0 0x500000>; }; &pil_slpi_mem { reg = <0x0 0x90f00000 0x0 0x1500000>; }; &pil_ipa_fw_mem { reg = <0x0 0x92400000 0x0 0x10000>; }; &pil_ipa_gsi_mem { reg = <0x0 0x92410000 0x0 0xa000>; }; &pil_gpu_mem { reg = <0x0 0x9241a000 0x0 0x2000>; }; &pil_spss_mem { reg = <0x0 0x92500000 0x0 0x100000>; }; &pil_cdsp_mem { reg = <0x0 0x92600000 0x0 0x1400000>; }; Loading
arch/arm64/boot/dts/qcom/sm8150-marmot.dtsi +32 −0 Original line number Diff line number Diff line Loading @@ -276,3 +276,35 @@ }; }; }; &pil_modem_mem { reg = <0x0 0x8d800000 0x0 0x3200000>; }; &pil_video_mem { reg = <0x0 0x90a00000 0x0 0x500000>; }; &pil_slpi_mem { reg = <0x0 0x90f00000 0x0 0x1500000>; }; &pil_ipa_fw_mem { reg = <0x0 0x92400000 0x0 0x10000>; }; &pil_ipa_gsi_mem { reg = <0x0 0x92410000 0x0 0xa000>; }; &pil_gpu_mem { reg = <0x0 0x9241a000 0x0 0x2000>; }; &pil_spss_mem { reg = <0x0 0x92500000 0x0 0x100000>; }; &pil_cdsp_mem { reg = <0x0 0x92600000 0x0 0x1400000>; };