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Commit c6c6e6ac authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "clk: qcom: gcc-qcs405: Add support for vdd_sr_pll regulator"

parents 34b58d7e 3537967f

arch/arm64/boot/dts/qcom/qcs405.dtsi

+1 −0
Original line number Original line Diff line number Diff line
@@ -310,6 +310,7 @@ 
		reg = <0x1800000 0x80000>;

		reg = <0x1800000 0x80000>;

		reg-names = "cc_base";

		reg-names = "cc_base";

		vdd_cx-supply = <&pms405_s1_level>;

		vdd_cx-supply = <&pms405_s1_level>;

		vdd_sr_pll-supply = <&pms405_l3>;

		clocks = <&clock_rpmcc RPM_SMD_XO_CLK_SRC>;

		clocks = <&clock_rpmcc RPM_SMD_XO_CLK_SRC>;

		qcom,gcc_oxili_gfx3d_clk-opp-handle = <&msm_gpu>;

		qcom,gcc_oxili_gfx3d_clk-opp-handle = <&msm_gpu>;

		clock-names = "cxo";

		clock-names = "cxo";

drivers/clk/qcom/gcc-qcs405.c

+14 −0
Original line number Original line Diff line number Diff line
@@ -41,6 +41,7 @@ 
#define F_SLEW(f, s, h, m, n, sf) { (f), (s), (2 * (h) - 1), (m), (n), (sf) }

#define F_SLEW(f, s, h, m, n, sf) { (f), (s), (2 * (h) - 1), (m), (n), (sf) }





static DEFINE_VDD_REGULATORS(vdd_cx, VDD_NUM, 1, vdd_corner);

static DEFINE_VDD_REGULATORS(vdd_cx, VDD_NUM, 1, vdd_corner);

static DEFINE_VDD_REGULATORS(vdd_sr_pll, VDD_SR_PLL_NUM, 1, vdd_sr_levels);





enum {

enum {

	P_CORE_BI_PLL_TEST_SE,

	P_CORE_BI_PLL_TEST_SE,
@@ -412,6 +413,11 @@ static struct clk_pll gpll6 = { 
		.parent_names = (const char *[]){ "cxo" },

		.parent_names = (const char *[]){ "cxo" },

		.num_parents = 1,

		.num_parents = 1,

		.ops = &clk_pll_ops,

		.ops = &clk_pll_ops,

		.vdd_class = &vdd_sr_pll,

		.rate_max = (unsigned long [VDD_SR_PLL_NUM]) {

			[VDD_SR_PLL_SVS] = 1080000000,

		},

		.num_rate_max = VDD_SR_PLL_NUM,

	},

	},

};

};
@@ -2957,6 +2963,14 @@ static int gcc_qcs405_probe(struct platform_device *pdev) 
		return PTR_ERR(vdd_cx.regulator[0]);

		return PTR_ERR(vdd_cx.regulator[0]);

	}

	}





	vdd_sr_pll.regulator[0] = devm_regulator_get(&pdev->dev, "vdd_sr_pll");

	if (IS_ERR(vdd_sr_pll.regulator[0])) {

		if (!(PTR_ERR(vdd_sr_pll.regulator[0]) == -EPROBE_DEFER))

			dev_err(&pdev->dev,

				"Unable to get vdd_sr_pll regulator\n");

		return PTR_ERR(vdd_sr_pll.regulator[0]);

	}



	clk_alpha_pll_configure(&gpll3_out_main, regmap, &gpll3_config);

	clk_alpha_pll_configure(&gpll3_out_main, regmap, &gpll3_config);





	clk = devm_clk_register(&pdev->dev, &wcnss_m_clk.hw);

	clk = devm_clk_register(&pdev->dev, &wcnss_m_clk.hw);

drivers/clk/qcom/vdd-level-405.h

+15 −0
Original line number Original line Diff line number Diff line
@@ -55,4 +55,19 @@ static int vdd_hf_levels[] = { 
	1800000, RPM_REGULATOR_LEVEL_TURBO,	/* VDD_HF_PLL_TUR */

	1800000, RPM_REGULATOR_LEVEL_TURBO,	/* VDD_HF_PLL_TUR */

};

};





enum vdd_sr_pll_levels {

	VDD_SR_PLL_OFF,

	VDD_SR_PLL_SVS,

	VDD_SR_PLL_NOM,

	VDD_SR_PLL_TUR,

	VDD_SR_PLL_NUM,

};



static int vdd_sr_levels[] = {

	0,	/* VDD_SR_PLL_OFF */

	976000,	/* VDD_SR_PLL_SVS */

	976000,	/* VDD_SR_PLL_NOM */

	976000,	/* VDD_SR_PLL_TUR */

};



#endif
 
#endif