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Commit c0ebbb08 authored by Pradeep P V K's avatar Pradeep P V K Committed by Gerrit - the friendly Code Review server
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mtd: devices: Add new Pagescope read feature for sdxprairie 



Add new enhanced read page feature 'Pagescope Read' support
for sdxprairie.

In QPIC v1, SW is needed to write EXEC_CMD register for each
Code word and collect any Status related to that CW before
issuing EXEC_CMD for next CW.

With Page scope command (Supported In QPIC v2 and higher),
currently supported only for read commands in bam mode, is
truly a page mode command where SW is required to  issue
EXEC_CMD only once for a page. Controller HW takes care of
Codeword specific details and automatically returns status
associated with each CW to BAM pipe, dedicated for status
deposition.

With this command, SW now can issue one read command for a
page and upon receiving completion interrupt, can process
status, that have already been deposited in memory through
status BAM pipe.

Below are the KPI values taken for 1GB reads
with/without Pagescope-read feature.

| With PS-read  | Without PS-read |      Diff(%)      |
|  26.59 sec.   |   29.40 sec.    | 2.81 sec.(10.56%) |
|  37.6 MB/s    |   34.0 MB/s     | 3.6 MB/s (10.58%) |.

Change-Id: I0380b46320861876b6b33b059caf2f966c13192a
Signed-off-by: default avatarPradeep P V K <ppvk@codeaurora.org>
parent 8823ecdd

drivers/mtd/devices/msm_qpic_nand.c

+869 −4

File changed.

Preview size limit exceeded, changes collapsed.

drivers/mtd/devices/msm_qpic_nand.h

+24 −0
Original line number Diff line number Diff line
@@ -182,6 +182,14 @@ 
#define MSM_NAND_READ_LOCATION_1(info)      MSM_NAND_REG(info, 0x30F24)

#define MSM_NAND_READ_LOCATION_LAST_CW_0(info) MSM_NAND_REG(info, 0x30F40)

#define MSM_NAND_READ_LOCATION_LAST_CW_1(info) MSM_NAND_REG(info, 0x30F44)

#define MSM_NAND_AUTO_STATUS_EN(info)       MSM_NAND_REG(info, 0x3002c)



#define NAND_FLASH_STATUS_EN                     BIT(0)

#define NANDC_BUFFER_STATUS_EN                   BIT(1)

#define NAND_ERASED_CW_DETECT_STATUS_EN          BIT(3)

#define NAND_FLASH_STATUS_LAST_CW_EN             BIT(16)

#define NANDC_BUFFER_STATUS_LAST_CW_EN           BIT(17)

#define NAND_ERASED_CW_DETECT_STATUS_LAST_CW_EN  BIT(19)



/* device commands */

#define MSM_NAND_CMD_PAGE_READ          0x32
@@ -194,6 +202,11 @@ 
#define MSM_NAND_CMD_BLOCK_ERASE        0x3A

#define MSM_NAND_CMD_FETCH_ID           0x0B



/* device read commands for pagescope */



#define MSM_NAND_CMD_PAGE_READ_ECC_PS   0x800033

#define MSM_NAND_CMD_PAGE_READ_ALL_PS   0x800034



/* Version Mask */

#define MSM_NAND_VERSION_MAJOR_MASK	0xF0000000

#define MSM_NAND_VERSION_MAJOR_SHIFT	28
@@ -231,6 +244,17 @@ struct msm_nand_rw_cmd_desc { 
	struct msm_nand_cmd_cw_desc cw_desc[];

};



/*

 * Structure that holds the flash, buffer,

 * erased codeword status after every codeword

 * read during Pagescope read operation.

 */

struct msm_nand_read_status_desc {

	uint32_t flash_status;

	uint32_t buffer_status;

	uint32_t erased_cw_status;

};



/*

 * Structure that defines the NAND controller properties as per the

 * NAND flash device/chip that is attached.