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Commit bfe939ef authored by Saranya Chidura's avatar Saranya Chidura
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ARM: dts: msm: add TMC buffer reset support for qcs405 



Add cti0 for TMC-ETR/ETF node to support the CTI trigger
on buffer full for qcs405.

Change-Id: I8a45402b2594d88fa494b4e51d05ddb94529cafa
Signed-off-by: default avatarSaranya Chidura <schidura@codeaurora.org>
parent b1b0a4ec

arch/arm64/boot/dts/qcom/qcs405-coresight.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -72,7 +72,7 @@ 
		arm,buffer-size = <0x400000>;



		coresight-name = "coresight-tmc-etr";

		coresight-ctis = <&cti0>;

		coresight-ctis = <&cti0 &cti0>;

		coresight-csr = <&csr>;



		clocks = <&clock_rpmcc RPM_QDSS_CLK>,
@@ -98,7 +98,7 @@ 
		reg-names = "tmc-base";



		coresight-name = "coresight-tmc-etf";

		coresight-ctis = <&cti0>;

		coresight-ctis = <&cti0 &cti0>;

		arm,default-sink;

		coresight-csr = <&csr>;