Commit b7f8d9ba authored Nov 04, 2019 by Andrew Murray Committed by Yabin Cui Dec 02, 2019

UPSTREAM: dt-bindings: arm: coresight: Add support for coresight-loses-context-with-cpu



Some coresight components, because of choices made during hardware
integration, require their state to be saved and restored across CPU low
power states.

The software has no reliable method of detecting when save/restore is
required thus let's add a binding to inform the kernel.

Signed-off-by: Andrew Murray <andrew.murray@arm.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20191104181251.26732-3-mathieu.poirier@linaro.org


Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

(Upstream commit b7909065e8ebaffd80375d01f5d151ff59b59ce6).

Bug: 140266694
Change-Id: If246eaf51410a623e3f00d883069f10ad030f6a1
Signed-off-by: Yabin Cui <yabinc@google.com>

parent 90bb36e9

Documentation/devicetree/bindings/arm/coresight.txt

+9 −0

Original line number	Diff line number	Diff line
		@@ -73,6 +73,15 @@ its hardware characteristcs.

		* port or ports: same as above.

		* Optional properties for all components:

		* arm,coresight-loses-context-with-cpu : boolean. Indicates that the
		hardware will lose register context on CPU power down (e.g. CPUIdle).
		An example of where this may be needed are systems which contain a
		coresight component and CPU in the same power domain. When the CPU
		powers down the coresight component also powers down and loses its
		context. This property is currently only used for the ETM 4.x driver.

		* Optional properties for ETM/PTMs:

		* arm,cp14: must be present if the system accesses ETM/PTM management