Loading arch/arm64/boot/dts/qcom/sm8150-vidc.dtsi +14 −14 Original line number Diff line number Diff line Loading @@ -31,22 +31,22 @@ cvp-supply = <&mvs1_gdsc>; /* Clocks */ clock-names = "core_clk", "iface_clk", "vcodec_clk", "cvp_clk", "gcc_video_axi0", "gcc_video_axi1", "gcc_video_axic"; clocks = <&clock_videocc VIDEO_CC_MVSC_CORE_CLK>, <&clock_videocc VIDEO_CC_IRIS_AHB_CLK>, <&clock_videocc VIDEO_CC_MVS0_CORE_CLK>, <&clock_videocc VIDEO_CC_MVS1_CORE_CLK>, clock-names = "gcc_video_axic", "gcc_video_axi0", "gcc_video_axi1", "core_clk", "vcodec_clk", "cvp_clk"; clocks = <&clock_gcc GCC_VIDEO_AXIC_CLK>, <&clock_gcc GCC_VIDEO_AXI0_CLK>, <&clock_gcc GCC_VIDEO_AXI1_CLK>, <&clock_gcc GCC_VIDEO_AXIC_CLK>; qcom,proxy-clock-names = "core_clk", "iface_clk", "vcodec_clk", "cvp_clk", "gcc_video_axi0", "gcc_video_axi1", "gcc_video_axic"; qcom,clock-configs = <0x1 0x0 0x1 0x1 0x0 0x0 0x0>; qcom,allowed-clock-rates = <200000000 225000000 300000000 365000000 432000000 480000000>; <&clock_videocc VIDEO_CC_MVSC_CORE_CLK>, <&clock_videocc VIDEO_CC_MVS0_CORE_CLK>, <&clock_videocc VIDEO_CC_MVS1_CORE_CLK>; qcom,proxy-clock-names = "gcc_video_axic", "gcc_video_axi0", "gcc_video_axi1", "core_clk", "vcodec_clk", "cvp_clk"; qcom,clock-configs = <0x0 0x0 0x0 0x1 0x1 0x1>; qcom,allowed-clock-rates = <225000000 300000000 365000000 432000000 480000000>; /* Buses */ bus_cnoc { Loading Loading
arch/arm64/boot/dts/qcom/sm8150-vidc.dtsi +14 −14 Original line number Diff line number Diff line Loading @@ -31,22 +31,22 @@ cvp-supply = <&mvs1_gdsc>; /* Clocks */ clock-names = "core_clk", "iface_clk", "vcodec_clk", "cvp_clk", "gcc_video_axi0", "gcc_video_axi1", "gcc_video_axic"; clocks = <&clock_videocc VIDEO_CC_MVSC_CORE_CLK>, <&clock_videocc VIDEO_CC_IRIS_AHB_CLK>, <&clock_videocc VIDEO_CC_MVS0_CORE_CLK>, <&clock_videocc VIDEO_CC_MVS1_CORE_CLK>, clock-names = "gcc_video_axic", "gcc_video_axi0", "gcc_video_axi1", "core_clk", "vcodec_clk", "cvp_clk"; clocks = <&clock_gcc GCC_VIDEO_AXIC_CLK>, <&clock_gcc GCC_VIDEO_AXI0_CLK>, <&clock_gcc GCC_VIDEO_AXI1_CLK>, <&clock_gcc GCC_VIDEO_AXIC_CLK>; qcom,proxy-clock-names = "core_clk", "iface_clk", "vcodec_clk", "cvp_clk", "gcc_video_axi0", "gcc_video_axi1", "gcc_video_axic"; qcom,clock-configs = <0x1 0x0 0x1 0x1 0x0 0x0 0x0>; qcom,allowed-clock-rates = <200000000 225000000 300000000 365000000 432000000 480000000>; <&clock_videocc VIDEO_CC_MVSC_CORE_CLK>, <&clock_videocc VIDEO_CC_MVS0_CORE_CLK>, <&clock_videocc VIDEO_CC_MVS1_CORE_CLK>; qcom,proxy-clock-names = "gcc_video_axic", "gcc_video_axi0", "gcc_video_axi1", "core_clk", "vcodec_clk", "cvp_clk"; qcom,clock-configs = <0x0 0x0 0x0 0x1 0x1 0x1>; qcom,allowed-clock-rates = <225000000 300000000 365000000 432000000 480000000>; /* Buses */ bus_cnoc { Loading