Loading arch/arm/mach-omap2/gpmc.c +2 −0 Original line number Original line Diff line number Diff line Loading @@ -534,6 +534,8 @@ void __init gpmc_init(void) BUG(); BUG(); } } clk_enable(gpmc_l3_clk); l = gpmc_read_reg(GPMC_REVISION); l = gpmc_read_reg(GPMC_REVISION); printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f); printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f); /* Set smart idle mode and automatic L3 clock gating */ /* Set smart idle mode and automatic L3 clock gating */ Loading arch/arm/mach-omap2/id.c +23 −18 Original line number Original line Diff line number Diff line Loading @@ -188,6 +188,8 @@ void __init omap3_check_revision(void) u16 hawkeye; u16 hawkeye; u8 rev; u8 rev; omap_chip.oc = CHIP_IS_OMAP3430; /* /* * We cannot access revision registers on ES1.0. * We cannot access revision registers on ES1.0. * If the processor type is Cortex-A8 and the revision is 0x0 * If the processor type is Cortex-A8 and the revision is 0x0 Loading @@ -196,6 +198,7 @@ void __init omap3_check_revision(void) cpuid = read_cpuid(CPUID_ID); cpuid = read_cpuid(CPUID_ID); if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { omap_revision = OMAP3430_REV_ES1_0; omap_revision = OMAP3430_REV_ES1_0; omap_chip.oc |= CHIP_IS_OMAP3430ES1; return; return; } } Loading @@ -216,18 +219,28 @@ void __init omap3_check_revision(void) case 0: /* Take care of early samples */ case 0: /* Take care of early samples */ case 1: case 1: omap_revision = OMAP3430_REV_ES2_0; omap_revision = OMAP3430_REV_ES2_0; omap_chip.oc |= CHIP_IS_OMAP3430ES2; break; break; case 2: case 2: omap_revision = OMAP3430_REV_ES2_1; omap_revision = OMAP3430_REV_ES2_1; omap_chip.oc |= CHIP_IS_OMAP3430ES2; break; break; case 3: case 3: omap_revision = OMAP3430_REV_ES3_0; omap_revision = OMAP3430_REV_ES3_0; omap_chip.oc |= CHIP_IS_OMAP3430ES3_0; break; break; case 4: case 4: omap_revision = OMAP3430_REV_ES3_1; omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; break; case 7: /* FALLTHROUGH */ /* FALLTHROUGH */ default: default: /* Use the latest known revision as default */ /* Use the latest known revision as default */ omap_revision = OMAP3430_REV_ES3_1; omap_revision = OMAP3430_REV_ES3_1_2; /* REVISIT: Add CHIP_IS_OMAP3430ES3_1_2? */ omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; } } break; break; case 0xb868: case 0xb868: Loading @@ -235,14 +248,18 @@ void __init omap3_check_revision(void) * * * Set the device to be OMAP3505 here. Actual device * Set the device to be OMAP3505 here. Actual device * is identified later based on the features. * is identified later based on the features. * * REVISIT: AM3505/AM3517 should have their own CHIP_IS */ */ omap_revision = OMAP3505_REV(rev); omap_revision = OMAP3505_REV(rev); omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; break; break; case 0xb891: case 0xb891: /* FALLTHROUGH */ /* FALLTHROUGH */ default: default: /* Unknown default to latest silicon rev as default*/ /* Unknown default to latest silicon rev as default*/ omap_revision = OMAP3630_REV_ES1_0; omap_revision = OMAP3630_REV_ES1_0; omap_chip.oc |= CHIP_IS_OMAP3630ES1; } } } } Loading Loading @@ -360,6 +377,7 @@ void __init omap2_check_revision(void) omap3_check_revision(); omap3_check_revision(); omap3_check_features(); omap3_check_features(); omap3_cpuinfo(); omap3_cpuinfo(); return; } else if (cpu_is_omap44xx()) { } else if (cpu_is_omap44xx()) { omap4_check_revision(); omap4_check_revision(); return; return; Loading @@ -374,27 +392,14 @@ void __init omap2_check_revision(void) if (cpu_is_omap243x()) { if (cpu_is_omap243x()) { /* Currently only supports 2430ES2.1 and 2430-all */ /* Currently only supports 2430ES2.1 and 2430-all */ omap_chip.oc |= CHIP_IS_OMAP2430; omap_chip.oc |= CHIP_IS_OMAP2430; return; } else if (cpu_is_omap242x()) { } else if (cpu_is_omap242x()) { /* Currently only supports 2420ES2.1.1 and 2420-all */ /* Currently only supports 2420ES2.1.1 and 2420-all */ omap_chip.oc |= CHIP_IS_OMAP2420; omap_chip.oc |= CHIP_IS_OMAP2420; } else if (cpu_is_omap3505() || cpu_is_omap3517()) { return; omap_chip.oc = CHIP_IS_OMAP3430 | CHIP_IS_OMAP3430ES3_1; } else if (cpu_is_omap343x()) { omap_chip.oc = CHIP_IS_OMAP3430; if (omap_rev() == OMAP3430_REV_ES1_0) omap_chip.oc |= CHIP_IS_OMAP3430ES1; else if (omap_rev() >= OMAP3430_REV_ES2_0 && omap_rev() <= OMAP3430_REV_ES2_1) omap_chip.oc |= CHIP_IS_OMAP3430ES2; else if (omap_rev() == OMAP3430_REV_ES3_0) omap_chip.oc |= CHIP_IS_OMAP3430ES3_0; else if (omap_rev() == OMAP3430_REV_ES3_1) omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; else if (omap_rev() == OMAP3630_REV_ES1_0) omap_chip.oc |= CHIP_IS_OMAP3630ES1; } else { pr_err("Uninitialized omap_chip, please fix!\n"); } } pr_err("Uninitialized omap_chip, please fix!\n"); } } /* /* Loading arch/arm/mach-omap2/mux.c +15 −12 Original line number Original line Diff line number Diff line Loading @@ -51,7 +51,7 @@ struct omap_mux_entry { static unsigned long mux_phys; static unsigned long mux_phys; static void __iomem *mux_base; static void __iomem *mux_base; static inline u16 omap_mux_read(u16 reg) u16 omap_mux_read(u16 reg) { { if (cpu_is_omap24xx()) if (cpu_is_omap24xx()) return __raw_readb(mux_base + reg); return __raw_readb(mux_base + reg); Loading @@ -59,7 +59,7 @@ static inline u16 omap_mux_read(u16 reg) return __raw_readw(mux_base + reg); return __raw_readw(mux_base + reg); } } static inline void omap_mux_write(u16 val, u16 reg) void omap_mux_write(u16 val, u16 reg) { { if (cpu_is_omap24xx()) if (cpu_is_omap24xx()) __raw_writeb(val, mux_base + reg); __raw_writeb(val, mux_base + reg); Loading @@ -67,6 +67,14 @@ static inline void omap_mux_write(u16 val, u16 reg) __raw_writew(val, mux_base + reg); __raw_writew(val, mux_base + reg); } } void omap_mux_write_array(struct omap_board_mux *board_mux) { while (board_mux->reg_offset != OMAP_MUX_TERMINATOR) { omap_mux_write(board_mux->value, board_mux->reg_offset); board_mux++; } } #if defined(CONFIG_ARCH_OMAP24XX) && defined(CONFIG_OMAP_MUX) #if defined(CONFIG_ARCH_OMAP24XX) && defined(CONFIG_OMAP_MUX) static struct omap_mux_cfg arch_mux_cfg; static struct omap_mux_cfg arch_mux_cfg; Loading Loading @@ -833,14 +841,6 @@ static void __init omap_mux_set_cmdline_signals(void) kfree(options); kfree(options); } } static void __init omap_mux_set_board_signals(struct omap_board_mux *board_mux) { while (board_mux->reg_offset != OMAP_MUX_TERMINATOR) { omap_mux_write(board_mux->value, board_mux->reg_offset); board_mux++; } } static int __init omap_mux_copy_names(struct omap_mux *src, static int __init omap_mux_copy_names(struct omap_mux *src, struct omap_mux *dst) struct omap_mux *dst) { { Loading Loading @@ -998,12 +998,15 @@ int __init omap_mux_init(u32 mux_pbase, u32 mux_size, omap_mux_package_fixup(package_subset, superset); omap_mux_package_fixup(package_subset, superset); if (package_balls) if (package_balls) omap_mux_package_init_balls(package_balls, superset); omap_mux_package_init_balls(package_balls, superset); omap_mux_set_cmdline_signals(); omap_mux_set_board_signals(board_mux); #endif #endif omap_mux_init_list(superset); omap_mux_init_list(superset); #ifdef CONFIG_OMAP_MUX omap_mux_set_cmdline_signals(); omap_mux_write_array(board_mux); #endif return 0; return 0; } } Loading arch/arm/mach-omap2/mux.h +24 −0 Original line number Original line Diff line number Diff line Loading @@ -146,6 +146,30 @@ u16 omap_mux_get_gpio(int gpio); */ */ void omap_mux_set_gpio(u16 val, int gpio); void omap_mux_set_gpio(u16 val, int gpio); /** * omap_mux_read() - read mux register * @mux_offset: Offset of the mux register * */ u16 omap_mux_read(u16 mux_offset); /** * omap_mux_write() - write mux register * @val: New mux register value * @mux_offset: Offset of the mux register * * This should be only needed for dynamic remuxing of non-gpio signals. */ void omap_mux_write(u16 val, u16 mux_offset); /** * omap_mux_write_array() - write an array of mux registers * @board_mux: Array of mux registers terminated by MAP_MUX_TERMINATOR * * This should be only needed for dynamic remuxing of non-gpio signals. */ void omap_mux_write_array(struct omap_board_mux *board_mux); /** /** * omap3_mux_init() - initialize mux system with board specific set * omap3_mux_init() - initialize mux system with board specific set * @board_mux: Board specific mux table * @board_mux: Board specific mux table Loading arch/arm/plat-omap/dma.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -1183,7 +1183,7 @@ void omap_dma_unlink_lch(int lch_head, int lch_queue) } } if ((dma_chan[lch_head].flags & OMAP_DMA_ACTIVE) || if ((dma_chan[lch_head].flags & OMAP_DMA_ACTIVE) || (dma_chan[lch_head].flags & OMAP_DMA_ACTIVE)) { (dma_chan[lch_queue].flags & OMAP_DMA_ACTIVE)) { printk(KERN_ERR "omap_dma: You need to stop the DMA channels " printk(KERN_ERR "omap_dma: You need to stop the DMA channels " "before unlinking\n"); "before unlinking\n"); dump_stack(); dump_stack(); Loading Loading
arch/arm/mach-omap2/gpmc.c +2 −0 Original line number Original line Diff line number Diff line Loading @@ -534,6 +534,8 @@ void __init gpmc_init(void) BUG(); BUG(); } } clk_enable(gpmc_l3_clk); l = gpmc_read_reg(GPMC_REVISION); l = gpmc_read_reg(GPMC_REVISION); printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f); printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f); /* Set smart idle mode and automatic L3 clock gating */ /* Set smart idle mode and automatic L3 clock gating */ Loading
arch/arm/mach-omap2/id.c +23 −18 Original line number Original line Diff line number Diff line Loading @@ -188,6 +188,8 @@ void __init omap3_check_revision(void) u16 hawkeye; u16 hawkeye; u8 rev; u8 rev; omap_chip.oc = CHIP_IS_OMAP3430; /* /* * We cannot access revision registers on ES1.0. * We cannot access revision registers on ES1.0. * If the processor type is Cortex-A8 and the revision is 0x0 * If the processor type is Cortex-A8 and the revision is 0x0 Loading @@ -196,6 +198,7 @@ void __init omap3_check_revision(void) cpuid = read_cpuid(CPUID_ID); cpuid = read_cpuid(CPUID_ID); if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { omap_revision = OMAP3430_REV_ES1_0; omap_revision = OMAP3430_REV_ES1_0; omap_chip.oc |= CHIP_IS_OMAP3430ES1; return; return; } } Loading @@ -216,18 +219,28 @@ void __init omap3_check_revision(void) case 0: /* Take care of early samples */ case 0: /* Take care of early samples */ case 1: case 1: omap_revision = OMAP3430_REV_ES2_0; omap_revision = OMAP3430_REV_ES2_0; omap_chip.oc |= CHIP_IS_OMAP3430ES2; break; break; case 2: case 2: omap_revision = OMAP3430_REV_ES2_1; omap_revision = OMAP3430_REV_ES2_1; omap_chip.oc |= CHIP_IS_OMAP3430ES2; break; break; case 3: case 3: omap_revision = OMAP3430_REV_ES3_0; omap_revision = OMAP3430_REV_ES3_0; omap_chip.oc |= CHIP_IS_OMAP3430ES3_0; break; break; case 4: case 4: omap_revision = OMAP3430_REV_ES3_1; omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; break; case 7: /* FALLTHROUGH */ /* FALLTHROUGH */ default: default: /* Use the latest known revision as default */ /* Use the latest known revision as default */ omap_revision = OMAP3430_REV_ES3_1; omap_revision = OMAP3430_REV_ES3_1_2; /* REVISIT: Add CHIP_IS_OMAP3430ES3_1_2? */ omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; } } break; break; case 0xb868: case 0xb868: Loading @@ -235,14 +248,18 @@ void __init omap3_check_revision(void) * * * Set the device to be OMAP3505 here. Actual device * Set the device to be OMAP3505 here. Actual device * is identified later based on the features. * is identified later based on the features. * * REVISIT: AM3505/AM3517 should have their own CHIP_IS */ */ omap_revision = OMAP3505_REV(rev); omap_revision = OMAP3505_REV(rev); omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; break; break; case 0xb891: case 0xb891: /* FALLTHROUGH */ /* FALLTHROUGH */ default: default: /* Unknown default to latest silicon rev as default*/ /* Unknown default to latest silicon rev as default*/ omap_revision = OMAP3630_REV_ES1_0; omap_revision = OMAP3630_REV_ES1_0; omap_chip.oc |= CHIP_IS_OMAP3630ES1; } } } } Loading Loading @@ -360,6 +377,7 @@ void __init omap2_check_revision(void) omap3_check_revision(); omap3_check_revision(); omap3_check_features(); omap3_check_features(); omap3_cpuinfo(); omap3_cpuinfo(); return; } else if (cpu_is_omap44xx()) { } else if (cpu_is_omap44xx()) { omap4_check_revision(); omap4_check_revision(); return; return; Loading @@ -374,27 +392,14 @@ void __init omap2_check_revision(void) if (cpu_is_omap243x()) { if (cpu_is_omap243x()) { /* Currently only supports 2430ES2.1 and 2430-all */ /* Currently only supports 2430ES2.1 and 2430-all */ omap_chip.oc |= CHIP_IS_OMAP2430; omap_chip.oc |= CHIP_IS_OMAP2430; return; } else if (cpu_is_omap242x()) { } else if (cpu_is_omap242x()) { /* Currently only supports 2420ES2.1.1 and 2420-all */ /* Currently only supports 2420ES2.1.1 and 2420-all */ omap_chip.oc |= CHIP_IS_OMAP2420; omap_chip.oc |= CHIP_IS_OMAP2420; } else if (cpu_is_omap3505() || cpu_is_omap3517()) { return; omap_chip.oc = CHIP_IS_OMAP3430 | CHIP_IS_OMAP3430ES3_1; } else if (cpu_is_omap343x()) { omap_chip.oc = CHIP_IS_OMAP3430; if (omap_rev() == OMAP3430_REV_ES1_0) omap_chip.oc |= CHIP_IS_OMAP3430ES1; else if (omap_rev() >= OMAP3430_REV_ES2_0 && omap_rev() <= OMAP3430_REV_ES2_1) omap_chip.oc |= CHIP_IS_OMAP3430ES2; else if (omap_rev() == OMAP3430_REV_ES3_0) omap_chip.oc |= CHIP_IS_OMAP3430ES3_0; else if (omap_rev() == OMAP3430_REV_ES3_1) omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; else if (omap_rev() == OMAP3630_REV_ES1_0) omap_chip.oc |= CHIP_IS_OMAP3630ES1; } else { pr_err("Uninitialized omap_chip, please fix!\n"); } } pr_err("Uninitialized omap_chip, please fix!\n"); } } /* /* Loading
arch/arm/mach-omap2/mux.c +15 −12 Original line number Original line Diff line number Diff line Loading @@ -51,7 +51,7 @@ struct omap_mux_entry { static unsigned long mux_phys; static unsigned long mux_phys; static void __iomem *mux_base; static void __iomem *mux_base; static inline u16 omap_mux_read(u16 reg) u16 omap_mux_read(u16 reg) { { if (cpu_is_omap24xx()) if (cpu_is_omap24xx()) return __raw_readb(mux_base + reg); return __raw_readb(mux_base + reg); Loading @@ -59,7 +59,7 @@ static inline u16 omap_mux_read(u16 reg) return __raw_readw(mux_base + reg); return __raw_readw(mux_base + reg); } } static inline void omap_mux_write(u16 val, u16 reg) void omap_mux_write(u16 val, u16 reg) { { if (cpu_is_omap24xx()) if (cpu_is_omap24xx()) __raw_writeb(val, mux_base + reg); __raw_writeb(val, mux_base + reg); Loading @@ -67,6 +67,14 @@ static inline void omap_mux_write(u16 val, u16 reg) __raw_writew(val, mux_base + reg); __raw_writew(val, mux_base + reg); } } void omap_mux_write_array(struct omap_board_mux *board_mux) { while (board_mux->reg_offset != OMAP_MUX_TERMINATOR) { omap_mux_write(board_mux->value, board_mux->reg_offset); board_mux++; } } #if defined(CONFIG_ARCH_OMAP24XX) && defined(CONFIG_OMAP_MUX) #if defined(CONFIG_ARCH_OMAP24XX) && defined(CONFIG_OMAP_MUX) static struct omap_mux_cfg arch_mux_cfg; static struct omap_mux_cfg arch_mux_cfg; Loading Loading @@ -833,14 +841,6 @@ static void __init omap_mux_set_cmdline_signals(void) kfree(options); kfree(options); } } static void __init omap_mux_set_board_signals(struct omap_board_mux *board_mux) { while (board_mux->reg_offset != OMAP_MUX_TERMINATOR) { omap_mux_write(board_mux->value, board_mux->reg_offset); board_mux++; } } static int __init omap_mux_copy_names(struct omap_mux *src, static int __init omap_mux_copy_names(struct omap_mux *src, struct omap_mux *dst) struct omap_mux *dst) { { Loading Loading @@ -998,12 +998,15 @@ int __init omap_mux_init(u32 mux_pbase, u32 mux_size, omap_mux_package_fixup(package_subset, superset); omap_mux_package_fixup(package_subset, superset); if (package_balls) if (package_balls) omap_mux_package_init_balls(package_balls, superset); omap_mux_package_init_balls(package_balls, superset); omap_mux_set_cmdline_signals(); omap_mux_set_board_signals(board_mux); #endif #endif omap_mux_init_list(superset); omap_mux_init_list(superset); #ifdef CONFIG_OMAP_MUX omap_mux_set_cmdline_signals(); omap_mux_write_array(board_mux); #endif return 0; return 0; } } Loading
arch/arm/mach-omap2/mux.h +24 −0 Original line number Original line Diff line number Diff line Loading @@ -146,6 +146,30 @@ u16 omap_mux_get_gpio(int gpio); */ */ void omap_mux_set_gpio(u16 val, int gpio); void omap_mux_set_gpio(u16 val, int gpio); /** * omap_mux_read() - read mux register * @mux_offset: Offset of the mux register * */ u16 omap_mux_read(u16 mux_offset); /** * omap_mux_write() - write mux register * @val: New mux register value * @mux_offset: Offset of the mux register * * This should be only needed for dynamic remuxing of non-gpio signals. */ void omap_mux_write(u16 val, u16 mux_offset); /** * omap_mux_write_array() - write an array of mux registers * @board_mux: Array of mux registers terminated by MAP_MUX_TERMINATOR * * This should be only needed for dynamic remuxing of non-gpio signals. */ void omap_mux_write_array(struct omap_board_mux *board_mux); /** /** * omap3_mux_init() - initialize mux system with board specific set * omap3_mux_init() - initialize mux system with board specific set * @board_mux: Board specific mux table * @board_mux: Board specific mux table Loading
arch/arm/plat-omap/dma.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -1183,7 +1183,7 @@ void omap_dma_unlink_lch(int lch_head, int lch_queue) } } if ((dma_chan[lch_head].flags & OMAP_DMA_ACTIVE) || if ((dma_chan[lch_head].flags & OMAP_DMA_ACTIVE) || (dma_chan[lch_head].flags & OMAP_DMA_ACTIVE)) { (dma_chan[lch_queue].flags & OMAP_DMA_ACTIVE)) { printk(KERN_ERR "omap_dma: You need to stop the DMA channels " printk(KERN_ERR "omap_dma: You need to stop the DMA channels " "before unlinking\n"); "before unlinking\n"); dump_stack(); dump_stack(); Loading