Merge "net: stmmac: Fix reading IOMACRO por values" (af3c5187) · Commits · e / devices / android_kernel_xiaomi_sm6125

drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c

+32 −3

Original line number	Diff line number	Diff line
		@@ -33,6 +33,20 @@
		static unsigned long tlmm_central_base_addr;
		bool phy_intr_en;

		static struct ethqos_emac_por emac_por[] = {
		{ .offset = RGMII_IO_MACRO_CONFIG, .value = 0x0 },
		{ .offset = SDCC_HC_REG_DLL_CONFIG, .value = 0x0 },
		{ .offset = SDCC_HC_REG_DDR_CONFIG, .value = 0x0 },
		{ .offset = SDCC_HC_REG_DLL_CONFIG2, .value = 0x0 },
		{ .offset = SDCC_USR_CTL, .value = 0x0 },
		{ .offset = RGMII_IO_MACRO_CONFIG2, .value = 0x0},
		};

		static struct ethqos_emac_driver_data emac_por_data = {
		.por = emac_por,
		.num_por = ARRAY_SIZE(emac_por),
		};

		struct qcom_ethqos *pethqos;

		struct stmmac_emb_smmu_cb_ctx stmmac_emb_smmu_ctx = {0};
		@@ -48,6 +62,21 @@ static struct qmp_pkt pkt;
		static char qmp_buf[MAX_QMP_MSG_SIZE + 1] = {0};
		static struct ip_params pparams = {"", "", "", ""};

		static void qcom_ethqos_read_iomacro_por_values(struct qcom_ethqos *ethqos)
		{
		int i;

		ethqos->por = emac_por_data.por;
		ethqos->num_por = emac_por_data.num_por;

		/* Read to POR values and enable clk */
		for (i = 0; i < ethqos->num_por; i++)
		ethqos->por[i].value =
		readl_relaxed(
		ethqos->rgmii_base +
		ethqos->por[i].offset);
		}

		static inline unsigned int dwmac_qcom_get_eth_type(unsigned char *buf)
		{
		return
		@@ -1045,7 +1074,7 @@ static void ethqos_pps_irq_config(struct qcom_ethqos *ethqos)
		}

		static const struct of_device_id qcom_ethqos_match[] = {
		{ .compatible = "qcom,sdxprairie-ethqos", .data = &emac_v2_3_2_por},
		{ .compatible = "qcom,sdxprairie-ethqos",},
		{ .compatible = "qcom,emac-smmu-embedded", },
		{ .compatible = "qcom,stmmac-ethqos", },
		{}
		@@ -1771,8 +1800,6 @@ static int qcom_ethqos_probe(struct platform_device *pdev)
		goto err_mem;
		}

		ethqos->por = of_device_get_match_data(&pdev->dev);

		ethqos->rgmii_clk = devm_clk_get(&pdev->dev, "rgmii");
		if (!ethqos->rgmii_clk) {
		ret = -ENOMEM;
		@@ -1880,6 +1907,8 @@ static int qcom_ethqos_probe(struct platform_device *pdev)
		pethqos = ethqos;
		ethqos_create_debugfs(ethqos);

		qcom_ethqos_read_iomacro_por_values(ethqos);

		ndev = dev_get_drvdata(&ethqos->pdev->dev);
		priv = netdev_priv(ndev);

drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.h

+4 −17

Original line number	Diff line number	Diff line
		@@ -380,22 +380,9 @@ struct ethqos_emac_por {
		unsigned int value;
		};

		static const struct ethqos_emac_por emac_v2_3_0_por[] = {
		{ .offset = RGMII_IO_MACRO_CONFIG, .value = 0x00C01343 },
		{ .offset = SDCC_HC_REG_DLL_CONFIG, .value = 0x2004642C },
		{ .offset = SDCC_HC_REG_DDR_CONFIG, .value = 0x00000000 },
		{ .offset = SDCC_HC_REG_DLL_CONFIG2, .value = 0x00200000 },
		{ .offset = SDCC_USR_CTL, .value = 0x00010800 },
		{ .offset = RGMII_IO_MACRO_CONFIG2, .value = 0x00002060 },
		};

		static const struct ethqos_emac_por emac_v2_3_2_por[] = {
		{ .offset = RGMII_IO_MACRO_CONFIG, .value = 0x00C01343 },
		{ .offset = SDCC_HC_REG_DLL_CONFIG, .value = 0x2004642C },
		{ .offset = SDCC_HC_REG_DDR_CONFIG, .value = 0x80040800 },
		{ .offset = SDCC_HC_REG_DLL_CONFIG2, .value = 0x00200000 },
		{ .offset = SDCC_USR_CTL, .value = 0x00010800 },
		{ .offset = RGMII_IO_MACRO_CONFIG2, .value = 0x00002060 },
		struct ethqos_emac_driver_data {
		struct ethqos_emac_por *por;
		unsigned int num_por;
		};

		struct qcom_ethqos {
		@@ -415,7 +402,7 @@ struct qcom_ethqos {
		/* Work struct for handling phy interrupt */
		struct work_struct emac_phy_work;

		const struct ethqos_emac_por *por;
		struct ethqos_emac_por *por;
		unsigned int num_por;
		unsigned int emac_ver;