Loading arch/arm64/boot/dts/qcom/sdxprairie-blsp.dtsi +7 −5 Original line number Diff line number Diff line /* Copyright (c) 2018, The Linux Foundation. All rights reserved. /* Copyright (c) 2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -403,7 +403,8 @@ pinctrl-0 = <&blsp1_uart2a_tx_sleep>, <&blsp1_uart2a_rxcts_sleep>, <&blsp1_uart2a_rfr_sleep>; pinctrl-1 = <&blsp1_uart2b_tx_active>, <&blsp1_uart2b_rxcts_active>, <&blsp1_uart2b_rfr_active>; <&blsp1_uart2b_rx_active>, <&blsp1_uart2b_cts_active>, <&blsp1_uart2b_rfr_active>; qcom,msm-bus,name = "buart2a"; qcom,msm-bus,num-cases = <2>; Loading Loading @@ -439,10 +440,11 @@ clocks = <&clock_gcc GCC_BLSP1_UART2_APPS_CLK>, <&clock_gcc GCC_BLSP1_AHB_CLK>; pinctrl-names = "sleep", "default"; pinctrl-0 = <&blsp1_uart2b_tx_sleep>, <&blsp1_uart2b_rxcts_sleep>, <&blsp1_uart2b_rfr_sleep>; pinctrl-0 = <&blsp1_uart2b_tx_sleep>, <&blsp1_uart2b_rx_sleep>, <&blsp1_uart2b_cts_sleep>, <&blsp1_uart2b_rfr_sleep>; pinctrl-1 = <&blsp1_uart2b_tx_active>, <&blsp1_uart2b_rxcts_active>, <&blsp1_uart2b_rfr_active>; <&blsp1_uart2b_rx_active>,<&blsp1_uart2b_cts_active>, <&blsp1_uart2b_rfr_active>; qcom,msm-bus,name = "buart2b"; qcom,msm-bus,num-cases = <2>; Loading arch/arm64/boot/dts/qcom/sdxprairie-pinctrl.dtsi +40 −10 Original line number Diff line number Diff line Loading @@ -1084,7 +1084,7 @@ config { pins = "gpio63"; drive-strength = <2>; bias-disable; bias-pull-up; }; }; Loading @@ -1098,32 +1098,61 @@ pins = "gpio63"; drive-strength = <2>; bias-pull-up; output-high; }; }; blsp1_uart2b_rxcts_active: blsp1_uart2b_rxcts_active { blsp1_uart2b_rx_active: blsp1_uart2b_rx_active { mux { pins = "gpio64", "gpio65"; pins = "gpio64"; function = "blsp_uart2"; }; config { pins = "gpio64", "gpio65"; pins = "gpio64"; drive-strength = <2>; bias-disable; }; }; blsp1_uart2b_rxcts_sleep: blsp1_uart2b_rxcts_sleep { blsp1_uart2b_rx_sleep: blsp1_uart2b_rx_sleep { mux { pins = "gpio64", "gpio65"; pins = "gpio64"; function = "gpio"; }; config { pins = "gpio64", "gpio65"; pins = "gpio64"; drive-strength = <2>; bias-no-pull; bias-pull-down; input-enable; }; }; blsp1_uart2b_cts_active: blsp1_uart2b_cts_active { mux { pins = "gpio65"; function = "blsp_uart2"; }; config { pins = "gpio65"; drive-strength = <2>; bias-disable; }; }; blsp1_uart2b_cts_sleep: blsp1_uart2b_cts_sleep { mux { pins = "gpio65"; function = "gpio"; }; config { pins = "gpio65"; drive-strength = <2>; bias-disable; input-enable; }; }; Loading @@ -1136,7 +1165,7 @@ config { pins = "gpio66"; drive-strength = <2>; bias-disable; bias-pull-down; }; }; Loading @@ -1149,7 +1178,8 @@ config { pins = "gpio66"; drive-strength = <2>; bias-no-pull; bias-pull-down; output-low; }; }; }; Loading Loading
arch/arm64/boot/dts/qcom/sdxprairie-blsp.dtsi +7 −5 Original line number Diff line number Diff line /* Copyright (c) 2018, The Linux Foundation. All rights reserved. /* Copyright (c) 2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -403,7 +403,8 @@ pinctrl-0 = <&blsp1_uart2a_tx_sleep>, <&blsp1_uart2a_rxcts_sleep>, <&blsp1_uart2a_rfr_sleep>; pinctrl-1 = <&blsp1_uart2b_tx_active>, <&blsp1_uart2b_rxcts_active>, <&blsp1_uart2b_rfr_active>; <&blsp1_uart2b_rx_active>, <&blsp1_uart2b_cts_active>, <&blsp1_uart2b_rfr_active>; qcom,msm-bus,name = "buart2a"; qcom,msm-bus,num-cases = <2>; Loading Loading @@ -439,10 +440,11 @@ clocks = <&clock_gcc GCC_BLSP1_UART2_APPS_CLK>, <&clock_gcc GCC_BLSP1_AHB_CLK>; pinctrl-names = "sleep", "default"; pinctrl-0 = <&blsp1_uart2b_tx_sleep>, <&blsp1_uart2b_rxcts_sleep>, <&blsp1_uart2b_rfr_sleep>; pinctrl-0 = <&blsp1_uart2b_tx_sleep>, <&blsp1_uart2b_rx_sleep>, <&blsp1_uart2b_cts_sleep>, <&blsp1_uart2b_rfr_sleep>; pinctrl-1 = <&blsp1_uart2b_tx_active>, <&blsp1_uart2b_rxcts_active>, <&blsp1_uart2b_rfr_active>; <&blsp1_uart2b_rx_active>,<&blsp1_uart2b_cts_active>, <&blsp1_uart2b_rfr_active>; qcom,msm-bus,name = "buart2b"; qcom,msm-bus,num-cases = <2>; Loading
arch/arm64/boot/dts/qcom/sdxprairie-pinctrl.dtsi +40 −10 Original line number Diff line number Diff line Loading @@ -1084,7 +1084,7 @@ config { pins = "gpio63"; drive-strength = <2>; bias-disable; bias-pull-up; }; }; Loading @@ -1098,32 +1098,61 @@ pins = "gpio63"; drive-strength = <2>; bias-pull-up; output-high; }; }; blsp1_uart2b_rxcts_active: blsp1_uart2b_rxcts_active { blsp1_uart2b_rx_active: blsp1_uart2b_rx_active { mux { pins = "gpio64", "gpio65"; pins = "gpio64"; function = "blsp_uart2"; }; config { pins = "gpio64", "gpio65"; pins = "gpio64"; drive-strength = <2>; bias-disable; }; }; blsp1_uart2b_rxcts_sleep: blsp1_uart2b_rxcts_sleep { blsp1_uart2b_rx_sleep: blsp1_uart2b_rx_sleep { mux { pins = "gpio64", "gpio65"; pins = "gpio64"; function = "gpio"; }; config { pins = "gpio64", "gpio65"; pins = "gpio64"; drive-strength = <2>; bias-no-pull; bias-pull-down; input-enable; }; }; blsp1_uart2b_cts_active: blsp1_uart2b_cts_active { mux { pins = "gpio65"; function = "blsp_uart2"; }; config { pins = "gpio65"; drive-strength = <2>; bias-disable; }; }; blsp1_uart2b_cts_sleep: blsp1_uart2b_cts_sleep { mux { pins = "gpio65"; function = "gpio"; }; config { pins = "gpio65"; drive-strength = <2>; bias-disable; input-enable; }; }; Loading @@ -1136,7 +1165,7 @@ config { pins = "gpio66"; drive-strength = <2>; bias-disable; bias-pull-down; }; }; Loading @@ -1149,7 +1178,8 @@ config { pins = "gpio66"; drive-strength = <2>; bias-no-pull; bias-pull-down; output-low; }; }; }; Loading