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Commit a8c81ea5 authored by Ashay Jaiswal's avatar Ashay Jaiswal
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power: battery: Change FCC stepper period to 100ms for PM8150B



FCC stepper algorihtm, when enabled, gradually ramps up/down the limit
whenever there is a FCC change. The default step rate is 100mA/sec.
This change provides a generic way to customize both step size and
period based on PMIC. In addition, set FCC step period to 100 ms for
PM8150B as per the hardware recommendation.

Change-Id: Iec8f952c3afb5050549289dcb3330f40062b3e85
Signed-off-by: default avatarAshay Jaiswal <ashayj@codeaurora.org>
parent 84c1ad45
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+26 −12
Original line number Diff line number Diff line
@@ -105,6 +105,8 @@ struct pl_data {
	int			taper_entry_fv;
	int			main_fcc_max;
	u32			float_voltage_uv;
	int			fcc_step_size_ua;
	int			fcc_step_delay_ms;
};

struct pl_data *the_chip;
@@ -526,8 +528,8 @@ ATTRIBUTE_GROUPS(batt_class);
 *  FCC  *
 **********/
#define EFFICIENCY_PCT	80
#define FCC_STEP_SIZE_UA 100000
#define FCC_STEP_UPDATE_DELAY_MS 1000
#define DEFAULT_FCC_STEP_SIZE_UA 100000
#define DEFAULT_FCC_STEP_UPDATE_DELAY_MS 1000
#define STEP_UP 1
#define STEP_DOWN -1
static void get_fcc_split(struct pl_data *chip, int total_ua,
@@ -650,21 +652,27 @@ static void get_fcc_stepper_params(struct pl_data *chip, int main_fcc_ua,
			goto skip_fcc_step_update;
		}
	}

	if (!chip->fcc_step_size_ua) {
		pr_err("Invalid fcc stepper step size, value 0\n");
		return;
	}

	/* Read current FCC of main charger */
	chip->main_fcc_ua = get_effective_result(chip->fcc_main_votable);
	chip->main_step_fcc_dir = (main_fcc_ua > chip->main_fcc_ua) ?
				STEP_UP : STEP_DOWN;
	chip->main_step_fcc_count = abs((main_fcc_ua - chip->main_fcc_ua) /
				FCC_STEP_SIZE_UA);
	chip->main_step_fcc_residual = abs((main_fcc_ua - chip->main_fcc_ua) %
				FCC_STEP_SIZE_UA);
				chip->fcc_step_size_ua);
	chip->main_step_fcc_residual = (main_fcc_ua - chip->main_fcc_ua) %
				chip->fcc_step_size_ua;

	chip->parallel_step_fcc_dir = (parallel_fcc_ua > chip->slave_fcc_ua) ?
				STEP_UP : STEP_DOWN;
	chip->parallel_step_fcc_count = abs((parallel_fcc_ua -
				chip->slave_fcc_ua) / FCC_STEP_SIZE_UA);
	chip->parallel_step_fcc_residual = abs((parallel_fcc_ua -
				chip->slave_fcc_ua)) % FCC_STEP_SIZE_UA;
				chip->slave_fcc_ua) / chip->fcc_step_size_ua);
	chip->parallel_step_fcc_residual = (parallel_fcc_ua -
				chip->slave_fcc_ua) % chip->fcc_step_size_ua;

skip_fcc_step_update:
	if (chip->parallel_step_fcc_count || chip->parallel_step_fcc_residual
@@ -955,19 +963,19 @@ static void fcc_stepper_work(struct work_struct *work)
	}

	if (chip->main_step_fcc_count) {
		main_fcc += (FCC_STEP_SIZE_UA * chip->main_step_fcc_dir);
		main_fcc += (chip->fcc_step_size_ua * chip->main_step_fcc_dir);
		chip->main_step_fcc_count--;
		reschedule_ms = FCC_STEP_UPDATE_DELAY_MS;
		reschedule_ms = chip->fcc_step_delay_ms;
	} else if (chip->main_step_fcc_residual) {
		main_fcc += chip->main_step_fcc_residual;
		chip->main_step_fcc_residual = 0;
	}

	if (chip->parallel_step_fcc_count) {
		parallel_fcc += (FCC_STEP_SIZE_UA *
		parallel_fcc += (chip->fcc_step_size_ua *
			chip->parallel_step_fcc_dir);
		chip->parallel_step_fcc_count--;
		reschedule_ms = FCC_STEP_UPDATE_DELAY_MS;
		reschedule_ms = chip->fcc_step_delay_ms;
	} else if (chip->parallel_step_fcc_residual) {
		parallel_fcc += chip->parallel_step_fcc_residual;
		chip->parallel_step_fcc_residual = 0;
@@ -1801,7 +1809,13 @@ static int pl_determine_initial_status(struct pl_data *chip)

static void pl_config_init(struct pl_data *chip, int smb_version)
{
	chip->fcc_step_size_ua = DEFAULT_FCC_STEP_SIZE_UA;
	chip->fcc_step_delay_ms = DEFAULT_FCC_STEP_UPDATE_DELAY_MS;

	switch (smb_version) {
	case PM8150B_SUBTYPE:
		chip->fcc_step_delay_ms = 100;
		break;
	case PMI8998_SUBTYPE:
	case PM660_SUBTYPE:
		chip->wa_flags = AICL_RERUN_WA_BIT | FORCE_INOV_DISABLE_BIT;