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Commit a7fdeb6a authored by Da Hoon Pyun's avatar Da Hoon Pyun Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Enable smp2p mailbox for atoll 



The mailbox controller implemented in NPU works as a bridge
between ipcc_mproc mailbox controller and its clients. It is
required because npu driver needs to control when IPCC irq can
be sent to NPUQ6.

Change-Id: I3b9d0eb77c834c10ddeed6aa2fea3858cdb6745e
Signed-off-by: default avatarDa Hoon Pyun <dpyun@codeaurora.org>
parent 2c0bd619

arch/arm64/boot/dts/qcom/atoll.dtsi

+1 −5
Original line number Diff line number Diff line
@@ -1542,10 +1542,6 @@ 
		qcom,pas-id = <23>;

		qcom,firmware-name = "npu";

		memory-region = <&pil_npu_mem>;



		/* Outputs to npu */

		qcom,smem-states = <&npu_smp2p_out 0>;

		qcom,smem-state-names = "qcom,force-stop";

	};



	qcom,turing@8300000 {
@@ -2520,7 +2516,7 @@ 
		compatible = "qcom,smp2p";

		qcom,smem = <617>, <616>;

		interrupts = <GIC_SPI 589 IRQ_TYPE_EDGE_RISING>;

		mboxes = <&apcs_glb2 6>;

		mboxes = <&msm_npu 6>;

		qcom,local-pid = <0>;

		qcom,remote-pid = <10>;