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Commit a50ccc6c authored by Zhenyu Wang's avatar Zhenyu Wang Committed by Dave Airlie
Browse files

agp/intel: add support for G41 chipset 



Signed-off-by: default avatarZhenyu Wang <zhenyu.z.wang@intel.com>
Signed-off-by: default avatarEric Anholt <eric@anholt.net>
Signed-off-by: default avatarDave Airlie <airlied@linux.ie>
parent 4a6908a3

drivers/char/agp/intel-agp.c

+8 −1
Original line number Original line Diff line number Diff line
@@ -40,6 +40,8 @@ 
#define PCI_DEVICE_ID_INTEL_Q45_IG          0x2E12

#define PCI_DEVICE_ID_INTEL_Q45_IG          0x2E12

#define PCI_DEVICE_ID_INTEL_G45_HB          0x2E20

#define PCI_DEVICE_ID_INTEL_G45_HB          0x2E20

#define PCI_DEVICE_ID_INTEL_G45_IG          0x2E22

#define PCI_DEVICE_ID_INTEL_G45_IG          0x2E22

#define PCI_DEVICE_ID_INTEL_G41_HB          0x2E30

#define PCI_DEVICE_ID_INTEL_G41_IG          0x2E32





/* cover 915 and 945 variants */

/* cover 915 and 945 variants */

#define IS_I915 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_E7221_HB || \

#define IS_I915 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_E7221_HB || \
@@ -63,7 +65,8 @@ 
#define IS_G4X (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGD_E_HB || \

#define IS_G4X (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGD_E_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q45_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q45_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G45_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G45_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_GM45_HB)

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_GM45_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G41_HB)





extern int agp_memory_reserved;

extern int agp_memory_reserved;
@@ -1196,6 +1199,7 @@ static void intel_i965_get_gtt_range(int *gtt_offset, int *gtt_size) 
	case PCI_DEVICE_ID_INTEL_IGD_E_HB:

	case PCI_DEVICE_ID_INTEL_IGD_E_HB:

	case PCI_DEVICE_ID_INTEL_Q45_HB:

	case PCI_DEVICE_ID_INTEL_Q45_HB:

	case PCI_DEVICE_ID_INTEL_G45_HB:

	case PCI_DEVICE_ID_INTEL_G45_HB:

	case PCI_DEVICE_ID_INTEL_G41_HB:

		*gtt_offset = *gtt_size = MB(2);

		*gtt_offset = *gtt_size = MB(2);

		break;

		break;

	default:

	default:
@@ -2163,6 +2167,8 @@ static const struct intel_driver_description { 
	    "Q45/Q43", NULL, &intel_i965_driver },

	    "Q45/Q43", NULL, &intel_i965_driver },

	{ PCI_DEVICE_ID_INTEL_G45_HB, PCI_DEVICE_ID_INTEL_G45_IG, 0,

	{ PCI_DEVICE_ID_INTEL_G45_HB, PCI_DEVICE_ID_INTEL_G45_IG, 0,

	    "G45/G43", NULL, &intel_i965_driver },

	    "G45/G43", NULL, &intel_i965_driver },

	{ PCI_DEVICE_ID_INTEL_G41_HB, PCI_DEVICE_ID_INTEL_G41_IG, 0,

	    "G41", NULL, &intel_i965_driver },

	{ 0, 0, 0, NULL, NULL, NULL }

	{ 0, 0, 0, NULL, NULL, NULL }

};

};
@@ -2360,6 +2366,7 @@ static struct pci_device_id agp_intel_pci_table[] = { 
	ID(PCI_DEVICE_ID_INTEL_IGD_E_HB),

	ID(PCI_DEVICE_ID_INTEL_IGD_E_HB),

	ID(PCI_DEVICE_ID_INTEL_Q45_HB),

	ID(PCI_DEVICE_ID_INTEL_Q45_HB),

	ID(PCI_DEVICE_ID_INTEL_G45_HB),

	ID(PCI_DEVICE_ID_INTEL_G45_HB),

	ID(PCI_DEVICE_ID_INTEL_G41_HB),

	{ }

	{ }

};

};