Merge "arm64 : dts: update i2s gpio functions for qcs405" (a4c2a641) · Commits · e / devices / android_kernel_xiaomi_sm6125

arch/arm64/boot/dts/qcom/qcs405-csra8plus2-audio-overlay.dtsi

+23 −5

Original line number	Diff line number	Diff line
		@@ -46,7 +46,7 @@

		pri_mi2s_gpios: pri_mi2s_pinctrl {
		compatible = "qcom,msm-cdc-pinctrl";
		pinctrl-names = "aud_active", "aud_sleep";
		pinctrl-names = "aud_active", "aud_sleep", "aud_alt_active";
		pinctrl-0 = <&pri_mi2s_sck_active &pri_mi2s_ws_active
		&pri_mi2s_sd0_active &pri_mi2s_sd1_active
		&pri_mi2s_sd2_active &pri_mi2s_sd3_active
		@@ -57,6 +57,10 @@
		&pri_mi2s_sd2_sleep &pri_mi2s_sd3_sleep
		&pri_mi2s_sd4_sleep &pri_mi2s_sd5_sleep
		&pri_mi2s_sd6_sleep &pri_mi2s_sd7_sleep>;
		pinctrl-2 = <&pri_mi2s_dsd_sck_active &pri_mi2s_dsd_d0_active
		&pri_mi2s_dsd_d1_active &pri_mi2s_dsd_d2_active
		&pri_mi2s_dsd_d3_active &pri_mi2s_dsd_d4_active
		&pri_mi2s_dsd_d5_active>;
		};

		sec_mi2s_gpios: sec_mi2s_pinctrl {
		@@ -72,11 +76,19 @@

		quat_mi2s_gpios: quat_mi2s_pinctrl {
		compatible = "qcom,msm-cdc-pinctrl";
		pinctrl-names = "aud_active", "aud_sleep";
		pinctrl-names = "aud_active", "aud_sleep", "aud_alt_active";
		pinctrl-0 = <&quat_mi2s_sck_active &quat_mi2s_ws_active
		&quat_mi2s_sd0_active &quat_mi2s_sd1_active>;
		&quat_mi2s_sd0_active &quat_mi2s_sd1_active
		&quat_mi2s_sd2_active &quat_mi2s_sd3_active
		&quat_mi2s_sd4_active>;
		pinctrl-1 = <&quat_mi2s_sck_sleep &quat_mi2s_ws_sleep
		&quat_mi2s_sd0_sleep &quat_mi2s_sd1_sleep>;
		&quat_mi2s_sd0_sleep &quat_mi2s_sd1_sleep
		&quat_mi2s_sd2_sleep &quat_mi2s_sd3_sleep
		&quat_mi2s_sd4_sleep>;
		pinctrl-2 = <&quat_mi2s_dsd_sck_active &quat_mi2s_dsd_d0_active
		&quat_mi2s_dsd_d1_active &quat_mi2s_dsd_d2_active
		&quat_mi2s_dsd_d3_active &quat_mi2s_dsd_d4_active
		&quat_mi2s_dsd_d5_active>;
		};
		};

		@@ -95,6 +107,8 @@
		qcom,va-bolero-codec = <1>;
		qcom,tasha-codec = <1>;
		qcom,csra-codec = <1>;
		tcsr_i2s_dsd_prim = <0x1959000>;
		tcsr_i2s_dsd_quat = <0x195A000>;
		asoc-codec = <&stub_codec>, <&bolero>;
		asoc-codec-names = "msm-stub-codec.1", "bolero_codec";
		qcom,csra-max-devs = <8>;
		@@ -156,9 +170,13 @@
		qcom,msm-mi2s-rx-lines = <0xff>;
		};

		&dai_mi2s3 {
		qcom,msm-mi2s-tx-lines = <0x3f>;
		};

		&dai_meta_mi2s0 {
		qcom,msm-mi2s-num-members = <2>;
		qcom,msm-mi2s-member-id = <0>, <3>;
		qcom,msm-mi2s-member-id = <0>, <1>;
		qcom,msm-mi2s-rx-lines = <0xff>, <0x03>;
		};

arch/arm64/boot/dts/qcom/qcs405-pinctrl.dtsi

+408 −8

Original line number	Diff line number	Diff line
		@@ -1870,6 +1870,207 @@
		};
		};
		};
		pri_mi2s_dsd_sck {
		pri_mi2s_dsd_sck_sleep: pri_mi2s_dsd_sck_sleep {
		mux {
		pins = "gpio87";
		function = "dsd_clk_a";
		};

		config {
		pins = "gpio87";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		pri_mi2s_dsd_sck_active: pri_mi2s_dsd_sck_active {
		mux {
		pins = "gpio87";
		function = "dsd_clk_a";
		};

		config {
		pins = "gpio87";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		pri_mi2s_dsd_d0 {
		pri_mi2s_dsd_d0_sleep: pri_mi2s_dsd_d0_sleep {
		mux {
		pins = "gpio88";
		function = "i2s_1_data0_dsd0";
		};

		config {
		pins = "gpio88";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		pri_mi2s_dsd_d0_active: pri_mi2s_dsd_d0_active {
		mux {
		pins = "gpio88";
		function = "i2s_1_data0_dsd0";
		};

		config {
		pins = "gpio88";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		pri_mi2s_dsd_d1 {
		pri_mi2s_dsd_d1_sleep: pri_mi2s_dsd_d1_sleep {
		mux {
		pins = "gpio89";
		function = "i2s_1_data1_dsd1";
		};

		config {
		pins = "gpio89";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		pri_mi2s_dsd_d1_active: pri_mi2s_dsd_d1_active {
		mux {
		pins = "gpio89";
		function = "i2s_1_data1_dsd1";
		};

		config {
		pins = "gpio89";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		pri_mi2s_dsd_d2 {
		pri_mi2s_dsd_d2_sleep: pri_mi2s_dsd_d2_sleep {
		mux {
		pins = "gpio90";
		function = "i2s_1_data2_dsd2";
		};

		config {
		pins = "gpio90";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		pri_mi2s_dsd_d2_active: pri_mi2s_dsd_d2_active {
		mux {
		pins = "gpio90";
		function = "i2s_1_data2_dsd2";
		};

		config {
		pins = "gpio90";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};
		pri_mi2s_dsd_d3 {
		pri_mi2s_dsd_d3_sleep: pri_mi2s_dsd_d3_sleep {
		mux {
		pins = "gpio91";
		function = "i2s_1_data3_dsd3";
		};

		config {
		pins = "gpio91";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		pri_mi2s_dsd_d3_active: pri_mi2s_dsd_d3_active {
		mux {
		pins = "gpio91";
		function = "i2s_1_data3_dsd3";
		};

		config {
		pins = "gpio91";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		pri_mi2s_dsd_d4 {
		pri_mi2s_dsd_d4_sleep: pri_mi2s_dsd_d4_sleep {
		mux {
		pins = "gpio92";
		function = "i2s_1_data4_dsd4";
		};

		config {
		pins = "gpio92";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		pri_mi2s_dsd_d4_active: pri_mi2s_dsd_d4_active {
		mux {
		pins = "gpio92";
		function = "i2s_1_data4_dsd4";
		};

		config {
		pins = "gpio92";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		pri_mi2s_dsd_d5 {
		pri_mi2s_dsd_d5_sleep: pri_mi2s_dsd_d5_sleep {
		mux {
		pins = "gpio93";
		function = "i2s_1_data5_dsd5";
		};

		config {
		pins = "gpio93";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		pri_mi2s_dsd_d5_active: pri_mi2s_dsd_d5_active {
		mux {
		pins = "gpio93";
		function = "i2s_1_data5_dsd5";
		};

		config {
		pins = "gpio93";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		pca9956b_reset_gpio: pca9956b_reset_gpio {
		mux {
		@@ -2289,6 +2490,209 @@
		};
		};


		quat_mi2s_dsd_sck {
		quat_mi2s_dsd_sck_sleep: quat_mi2s_dsd_sck_sleep {
		mux {
		pins = "gpio110";
		function = "dsd_clk_b";
		};

		config {
		pins = "gpio110";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		quat_mi2s_dsd_sck_active: quat_mi2s_dsd_sck_active {
		mux {
		pins = "gpio110";
		function = "dsd_clk_b";
		};

		config {
		pins = "gpio110";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		quat_mi2s_dsd_d0 {
		quat_mi2s_dsd_d0_sleep: quat_mi2s_dsd_d0_sleep {
		mux {
		pins = "gpio111";
		function = "i2s_4_data0_dsd0";
		};

		config {
		pins = "gpio111";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		quat_mi2s_dsd_d0_active: quat_mi2s_dsd_d0_active {
		mux {
		pins = "gpio111";
		function = "i2s_4_data0_dsd0";
		};

		config {
		pins = "gpio111";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		quat_mi2s_dsd_d1 {
		quat_mi2s_dsd_d1_sleep: quat_mi2s_dsd_d1_sleep {
		mux {
		pins = "gpio112";
		function = "i2s_4_data1_dsd1";
		};

		config {
		pins = "gpio112";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		quat_mi2s_dsd_d1_active: quat_mi2s_dsd_d1_active {
		mux {
		pins = "gpio112";
		function = "i2s_4_data1_dsd1";
		};

		config {
		pins = "gpio112";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		quat_mi2s_dsd_d2 {
		quat_mi2s_dsd_d2_sleep: quat_mi2s_dsd_d2_sleep {
		mux {
		pins = "gpio113";
		function = "i2s_4_data2_dsd2";
		};

		config {
		pins = "gpio113";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		quat_mi2s_dsd_d2_active: quat_mi2s_dsd_d2_active {
		mux {
		pins = "gpio113";
		function = "i2s_4_data2_dsd2";
		};

		config {
		pins = "gpio113";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};
		quat_mi2s_dsd_d3 {
		quat_mi2s_dsd_d3_sleep: quat_mi2s_dsd_d3_sleep {
		mux {
		pins = "gpio114";
		function = "i2s_4_data3_dsd3";
		};

		config {
		pins = "gpio114";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		quat_mi2s_dsd_d3_active: quat_mi2s_dsd_d3_active {
		mux {
		pins = "gpio114";
		function = "i2s_4_data3_dsd3";
		};

		config {
		pins = "gpio114";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		quat_mi2s_dsd_d4 {
		quat_mi2s_dsd_d4_sleep: quat_mi2s_dsd_d4_sleep {
		mux {
		pins = "gpio115";
		function = "i2s_4_data4_dsd4";
		};

		config {
		pins = "gpio115";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		quat_mi2s_dsd_d4_active: quat_mi2s_dsd_d4_active {
		mux {
		pins = "gpio115";
		function = "i2s_4_data4_dsd4";
		};

		config {
		pins = "gpio115";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		quat_mi2s_dsd_d5 {
		quat_mi2s_dsd_d5_sleep: quat_mi2s_dsd_d5_sleep {
		mux {
		pins = "gpio116";
		function = "i2s_4_data5_dsd5";
		};

		config {
		pins = "gpio116";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		quat_mi2s_dsd_d5_active: quat_mi2s_dsd_d5_active {
		mux {
		pins = "gpio116";
		function = "i2s_4_data5_dsd5";
		};

		config {
		pins = "gpio116";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		/* SPDIF optical input pin */
		spdifrx_opt {
		spdifrx_opt_default: spdifrx_opt_default {
		@@ -2705,14 +3109,12 @@
		evb_tlmm_gpio_key{
		tlmm_gpio_key_active: tlmm_gpio_key_active {
		mux {
		pins = "gpio21","gpio52","gpio54",
		"gpio115";
		pins = "gpio21","gpio52","gpio54";
		function = "gpio";
		};

		config {
		pins = "gpio21","gpio52","gpio54",
		"gpio115";
		pins = "gpio21","gpio52","gpio54";
		drive-strength = <2>;
		bias-pull-up;
		};
		@@ -2720,14 +3122,12 @@

		tlmm_gpio_key_suspend: tlmm_gpio_key_suspend {
		mux {
		pins = "gpio21","gpio52","gpio54",
		"gpio115";
		pins = "gpio21","gpio52","gpio54";
		function = "gpio";
		};

		config {
		pins = "gpio21","gpio52","gpio54",
		"gpio115";
		pins = "gpio21","gpio52","gpio54";
		drive-strength = <2>;
		bias-disable;
		};