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Commit 9efce70b authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
Browse files

Merge "drm/msm/sde: update drm plane with initial status"

parents ab190d95 1af65196

drivers/gpu/drm/msm/sde/sde_crtc.c

+12 −1
Original line number Diff line number Diff line
@@ -4237,6 +4237,7 @@ static void sde_crtc_disable(struct drm_crtc *crtc) 
	struct sde_crtc_irq_info *node = NULL;

	struct drm_event event;

	u32 power_on;

	bool in_cont_splash = false;

	int ret, i;



	if (!crtc || !crtc->dev || !crtc->dev->dev_private || !crtc->state) {
@@ -4319,8 +4320,18 @@ static void sde_crtc_disable(struct drm_crtc *crtc) 
	}

	spin_unlock_irqrestore(&sde_crtc->spin_lock, flags);



	drm_for_each_encoder(encoder, crtc->dev) {

		if (encoder->crtc != crtc)

			continue;



		if (sde_encoder_in_cont_splash(encoder)) {

			in_cont_splash = true;

			break;

		}

	}



	/* avoid clk/bw downvote if cont-splash is enabled */

	if (!sde_kms->splash_data.cont_splash_en)

	if (!in_cont_splash)

		sde_core_perf_crtc_update(crtc, 0, true);



	drm_for_each_encoder(encoder, crtc->dev) {

drivers/gpu/drm/msm/sde/sde_encoder.c

+34 −8
Original line number Diff line number Diff line
@@ -445,6 +445,14 @@ int sde_encoder_in_clone_mode(struct drm_encoder *drm_enc) 
		sde_enc->cur_master->in_clone_mode;

}



int sde_encoder_in_cont_splash(struct drm_encoder *drm_enc)

{

	struct sde_encoder_virt *sde_enc = to_sde_encoder_virt(drm_enc);



	return sde_enc && sde_enc->cur_master &&

		sde_enc->cur_master->cont_splash_enabled;

}



static inline int _sde_encoder_power_enable(struct sde_encoder_virt *sde_enc,

								bool enable)

{
@@ -2897,7 +2905,7 @@ static void _sde_encoder_virt_enable_helper(struct drm_encoder *drm_enc) 


	if (sde_enc->cur_master->hw_ctl &&

			sde_enc->cur_master->hw_ctl->ops.setup_intf_cfg_v1 &&

			!sde_kms->splash_data.cont_splash_en)

			!sde_enc->cur_master->cont_splash_enabled)

		sde_enc->cur_master->hw_ctl->ops.setup_intf_cfg_v1(

				sde_enc->cur_master->hw_ctl,

				&sde_enc->cur_master->intf_cfg_v1);
@@ -3151,7 +3159,7 @@ static void sde_encoder_virt_disable(struct drm_encoder *drm_enc) 


	for (i = 0; i < sde_enc->num_phys_encs; i++) {

		if (sde_enc->phys_encs[i]) {

			sde_enc->phys_encs[i]->cont_splash_settings = false;

			sde_enc->phys_encs[i]->cont_splash_enabled = false;

			sde_enc->phys_encs[i]->cont_splash_single_flush = 0;

			sde_enc->phys_encs[i]->connector = NULL;

		}
@@ -4361,8 +4369,8 @@ int sde_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc, 
		}

	}



	if (_sde_encoder_is_dsc_enabled(drm_enc) &&

		!sde_kms->splash_data.cont_splash_en) {

	if (_sde_encoder_is_dsc_enabled(drm_enc) && sde_enc->cur_master &&

			!sde_enc->cur_master->cont_splash_enabled) {

		rc = _sde_encoder_dsc_setup(sde_enc, params);

		if (rc) {

			SDE_ERROR_ENC(sde_enc, "failed to setup DSC: %d\n", rc);
@@ -5172,9 +5180,12 @@ enum sde_intf_mode sde_encoder_get_intf_mode(struct drm_encoder *encoder) 
 * sde_encoder_update_caps_for_cont_splash - update encoder settings during

 *	device bootup when cont_splash is enabled

 * @drm_enc:	Pointer to drm encoder structure

 * @splash_display: Pointer to sde_splash_display corresponding to this encoder

 * @enable:	boolean indicates enable or displae state of splash

 * @Return:	true if successful in updating the encoder structure

 */

int sde_encoder_update_caps_for_cont_splash(struct drm_encoder *encoder)

int sde_encoder_update_caps_for_cont_splash(struct drm_encoder *encoder,

		struct sde_splash_display *splash_display, bool enable)

{

	struct sde_encoder_virt *sde_enc;

	struct msm_drm_private *priv;
@@ -5212,6 +5223,21 @@ int sde_encoder_update_caps_for_cont_splash(struct drm_encoder *encoder) 
	SDE_DEBUG_ENC(sde_enc,

			"num of connectors: %d\n", priv->num_connectors);



	SDE_DEBUG_ENC(sde_enc, "enable: %d\n", enable);

	if (!enable) {

		for (i = 0; i < sde_enc->num_phys_encs; i++) {

			phys_enc = sde_enc->phys_encs[i];

			if (phys_enc)

				phys_enc->cont_splash_enabled = false;

		}

		return ret;

	}



	if (!splash_display) {

		SDE_ERROR_ENC(sde_enc, "invalid splash data\n");

		return  -EINVAL;

	}



	for (i = 0; i < priv->num_connectors; i++) {

		SDE_DEBUG_ENC(sde_enc, "connector id: %d\n",

				priv->connectors[i]->base.id);
@@ -5352,9 +5378,9 @@ int sde_encoder_update_caps_for_cont_splash(struct drm_encoder *encoder) 


		/* update connector for master and slave phys encoders */

		phys->connector = conn;

		phys->cont_splash_enabled = true;

		phys->cont_splash_single_flush =

			sde_kms->splash_data.single_flush_en;

		phys->cont_splash_settings = true;

			splash_display->single_flush_en;



		phys->hw_pp = sde_enc->hw_pp[i];

		if (phys->ops.cont_splash_mode_set)

drivers/gpu/drm/msm/sde/sde_encoder.h

+11 −1
Original line number Diff line number Diff line
@@ -236,9 +236,12 @@ void sde_encoder_prepare_commit(struct drm_encoder *drm_enc); 
 * sde_encoder_update_caps_for_cont_splash - update encoder settings during

 *	device bootup when cont_splash is enabled

 * @drm_enc:    Pointer to drm encoder structure

 * @splash_display: Pointer to sde_splash_display corresponding to this encoder

 * @enable:	boolean indicates enable or displae state of splash

 * @Return:     true if successful in updating the encoder structure

 */

int sde_encoder_update_caps_for_cont_splash(struct drm_encoder *encoder);

int sde_encoder_update_caps_for_cont_splash(struct drm_encoder *encoder,

		struct sde_splash_display *splash_display, bool enable);



/**

 * sde_encoder_display_failure_notification - update sde encoder state for
@@ -285,4 +288,11 @@ int sde_encoder_in_clone_mode(struct drm_encoder *enc); 
 */

void sde_encoder_control_idle_pc(struct drm_encoder *enc, bool enable);



/**

 * sde_encoder_in_cont_splash - checks if display is in continuous splash

 * @drm_enc:    Pointer to drm encoder structure

 * @Return:     true if display in continuous splash

 */

int sde_encoder_in_cont_splash(struct drm_encoder *enc);



#endif /* __SDE_ENCODER_H__ */

drivers/gpu/drm/msm/sde/sde_encoder_phys.h

+3 −3
Original line number Diff line number Diff line
@@ -285,7 +285,7 @@ struct sde_encoder_irq { 
 * @irq:			IRQ tracking structures

 * @has_intf_te:		Interface TE configuration support

 * @cont_splash_single_flush	Variable to check if single flush is enabled.

 * @cont_splash_settings	Variable to store continuous splash settings.

 * @cont_splash_enabled:	Variable to store continuous splash settings.

 * @in_clone_mode		Indicates if encoder is in clone mode ref@CWB

 * @vfp_cached:			cached vertical front porch to be used for

 *				programming ROT and MDP fetch start
@@ -324,7 +324,7 @@ struct sde_encoder_phys { 
	struct sde_encoder_irq irq[INTR_IDX_MAX];

	bool has_intf_te;

	u32 cont_splash_single_flush;

	bool cont_splash_settings;

	bool cont_splash_enabled;

	bool in_clone_mode;

	int vfp_cached;

};
@@ -690,7 +690,7 @@ static inline bool sde_encoder_phys_needs_single_flush( 
	if (!phys_enc)

		return false;



	return phys_enc->cont_splash_settings ?

	return phys_enc->cont_splash_enabled ?

			phys_enc->cont_splash_single_flush :

			(_sde_encoder_phys_is_ppsplit(phys_enc) ||

				_sde_encoder_phys_is_dual_ctl(phys_enc));

drivers/gpu/drm/msm/sde/sde_encoder_phys_cmd.c

+1 −1
Original line number Diff line number Diff line
@@ -1131,7 +1131,7 @@ static void sde_encoder_phys_cmd_enable(struct sde_encoder_phys *phys_enc) 
	SDE_DEBUG_CMDENC(cmd_enc, "pp %d\n", phys_enc->hw_pp->idx - PINGPONG_0);



	if (phys_enc->enable_state == SDE_ENC_ENABLED) {

		if (!phys_enc->sde_kms->splash_data.cont_splash_en)

		if (!phys_enc->cont_splash_enabled)

			SDE_ERROR("already enabled\n");

		return;

	}