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Commit 94e06df5 authored by Amit Nischal's avatar Amit Nischal Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Update the gcc and video clock nodes for SDMMAGPIE



Update the GCC and VIDEOCC clock controller device nodes to register
to actual clock controller drivers. Also update the GCC and VIDEOCC
GDSCs by replacing the dummy nodes with actual GDSC regulator driver.

Change-Id: Ie707e4cee199e11c2fde2c0e28ee4b18ab80a4dd
Signed-off-by: default avatarAmit Nischal <anischal@codeaurora.org>
parent 42d6e158
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+14 −14
Original line number Diff line number Diff line
@@ -14,7 +14,7 @@
&soc {
	/* GDSCs in Global CC */
	pcie_0_gdsc: qcom,gdsc@16b004 {
		compatible = "regulator-fixed";
		compatible = "qcom,gdsc";
		regulator-name = "pcie_0_gdsc";
		reg = <0x16b004 0x4>;
		qcom,poll-cfg-gdscr;
@@ -22,7 +22,7 @@
	};

	pcie_tbu_gdsc: qcom,gdsc@128004 {
		compatible = "regulator-fixed";
		compatible = "qcom,gdsc";
		regulator-name = "pcie_tbu_gdsc";
		reg = <0x128004 0x4>;
		qcom,poll-cfg-gdscr;
@@ -30,7 +30,7 @@
	};

	ufs_phy_gdsc: qcom,gdsc@177004 {
		compatible = "regulator-fixed";
		compatible = "qcom,gdsc";
		regulator-name = "ufs_phy_gdsc";
		reg = <0x177004 0x4>;
		qcom,poll-cfg-gdscr;
@@ -38,7 +38,7 @@
	};

	usb30_prim_gdsc: qcom,gdsc@10f004 {
		compatible = "regulator-fixed";
		compatible = "qcom,gdsc";
		regulator-name = "usb30_prim_gdsc";
		reg = <0x10f004 0x4>;
		qcom,poll-cfg-gdscr;
@@ -46,7 +46,7 @@
	};

	hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc: qcom,gdsc@17d030 {
		compatible = "regulator-fixed";
		compatible = "qcom,gdsc";
		regulator-name = "hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc";
		reg = <0x17d030 0x4>;
		qcom,no-status-check-on-disable;
@@ -55,7 +55,7 @@
	};

	hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc: qcom,gdsc@17d03c {
		compatible = "regulator-fixed";
		compatible = "qcom,gdsc";
		regulator-name = "hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc";
		reg = <0x17d03c 0x4>;
		qcom,no-status-check-on-disable;
@@ -64,7 +64,7 @@
	};

	hlos1_vote_aggre_noc_mmu_tbu1_gdsc: qcom,gdsc@17d034 {
		compatible = "regulator-fixed";
		compatible = "qcom,gdsc";
		regulator-name = "hlos1_vote_aggre_noc_mmu_tbu1_gdsc";
		reg = <0x17d034 0x4>;
		qcom,no-status-check-on-disable;
@@ -73,7 +73,7 @@
	};

	hlos1_vote_aggre_noc_mmu_tbu2_gdsc: qcom,gdsc@17d038 {
		compatible = "regulator-fixed";
		compatible = "qcom,gdsc";
		regulator-name = "hlos1_vote_aggre_noc_mmu_tbu2_gdsc";
		reg = <0x17d038 0x4>;
		qcom,no-status-check-on-disable;
@@ -82,7 +82,7 @@
	};

	hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc: qcom,gdsc@17d040 {
		compatible = "regulator-fixed";
		compatible = "qcom,gdsc";
		regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc";
		reg = <0x17d040 0x4>;
		qcom,no-status-check-on-disable;
@@ -91,7 +91,7 @@
	};

	hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc: qcom,gdsc@17d048 {
		compatible = "regulator-fixed";
		compatible = "qcom,gdsc";
		regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc";
		reg = <0x17d048 0x4>;
		qcom,no-status-check-on-disable;
@@ -100,7 +100,7 @@
	};

	hlos1_vote_mmnoc_mmu_tbu_sf_gdsc: qcom,gdsc@17d044 {
		compatible = "regulator-fixed";
		compatible = "qcom,gdsc";
		regulator-name = "hlos1_vote_mmnoc_mmu_tbu_sf_gdsc";
		reg = <0x17d044 0x4>;
		qcom,no-status-check-on-disable;
@@ -196,21 +196,21 @@

	/* GDSCs in Video CC */
	mvsc_gdsc: qcom,gdsc@0b00814 {
		compatible = "regulator-fixed";
		compatible = "qcom,gdsc";
		regulator-name = "mvsc_gdsc";
		reg = <0xab00814 0x4>;
		status = "disabled";
	};

	mvs0_gdsc: qcom,gdsc@ab00874 {
		compatible = "regulator-fixed";
		compatible = "qcom,gdsc";
		regulator-name = "mvs0_gdsc";
		reg = <0xab00874 0x4>;
		status = "disabled";
	};

	mvs1_gdsc: qcom,gdsc@ab008b4 {
		compatible = "regulator-fixed";
		compatible = "qcom,gdsc";
		regulator-name = "mvs1_gdsc";
		reg = <0xab008b4 0x4>;
		status = "disabled";
+11 −6
Original line number Diff line number Diff line
@@ -643,9 +643,12 @@
		mbox-names = "qdss_clk";
	};

	clock_gcc: qcom,gcc {
		compatible = "qcom,dummycc";
		clock-output-names = "gcc_clocks";
	clock_gcc: qcom,gcc@100000 {
		compatible = "qcom,gcc-sdmmagpie", "syscon";
		vdd_cx-supply = <&VDD_CX_LEVEL>;
		vdd_cx_ao-supply = <&VDD_CX_LEVEL_AO>;
		reg = <0x100000 0x1f0000>;
		reg-names = "cc_base";
		#clock-cells = <1>;
		#reset-cells = <1>;
	};
@@ -664,9 +667,11 @@
		#reset-cells = <1>;
	};

	clock_videocc: qcom,videocc {
		compatible = "qcom,dummycc";
		clock-output-names = "videocc_clocks";
	clock_videocc: qcom,videocc@ab00000 {
		compatible = "qcom,videocc-sdmmagpie", "syscon";
		vdd_cx-supply = <&VDD_CX_LEVEL>;
		reg = <0xab00000 0x10000>;
		reg-names = "cc_base";
		#clock-cells = <1>;
		#reset-cells = <1>;
	};