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Commit 8da9ea1d authored by Jeyaprakash Soundrapandian's avatar Jeyaprakash Soundrapandian Committed by Gerrit - the friendly Code Review server
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Merge "DOWNSTREAM: Merge AU268 commit...

Merge "DOWNSTREAM: Merge AU268 commit 'c8be6380' onto Topic - 07/18/18" into dev/msm-4.14-camx
parents 6381e47c 7a8d5b01
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+3 −1
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@@ -69,7 +69,9 @@ Date: September 2014
Contact:        linuxppc-dev@lists.ozlabs.org
Description:    read/write
                Set the mode for prefaulting in segments into the segment table
                when performing the START_WORK ioctl. Possible values:
                when performing the START_WORK ioctl. Only applicable when
                running under hashed page table mmu.
                Possible values:
                        none: No prefaulting (default)
                        work_element_descriptor: Treat the work element
                                 descriptor as an effective address and
+17 −0
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@@ -4006,6 +4006,23 @@
			expediting.  Set to zero to disable automatic
			expediting.

	ssbd=		[ARM64,HW]
			Speculative Store Bypass Disable control

			On CPUs that are vulnerable to the Speculative
			Store Bypass vulnerability and offer a
			firmware based mitigation, this parameter
			indicates how the mitigation should be used:

			force-on:  Unconditionally enable mitigation for
				   for both kernel and userspace
			force-off: Unconditionally disable mitigation for
				   for both kernel and userspace
			kernel:    Always enable mitigation in the
				   kernel, and offer a prctl interface
				   to allow userspace to register its
				   interest in being mitigated too.

	stack_guard_gap=	[MM]
			override the default stack gap protection. The value
			is in page units and it defines how many pages prior
+468 −0

File added.

Preview size limit exceeded, changes collapsed.

+10 −4
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@@ -53,6 +53,9 @@ SoCs:
- QCS405
  compatible = "qcom,qcs405"

- QCS403
  compatible = "qcom,qcs403"

- SDXPRAIRIE
  compatible = "qcom,sdxprairie"

@@ -100,6 +103,8 @@ Generic board variants:
- RUMI device:
  compatible = "qcom,rumi"

- IOT device:
  compatible = "qcom,iot"


Boards (SoC type + board variant):
@@ -156,10 +161,11 @@ compatible = "qcom,sm6150-cdp"
compatible = "qcom,sm6150-qrd"
compatible = "qcom,sm6150-idp"
compatible = "qcom,qcs405-rumi"
compatible = "qcom,qcs405-mtp"
compatible = "qcom,qcs405-cdp"
compatible = "qcom,sm8150-auto-adp-star"
compatible = "qcom,auto-adp-star"
compatible = "qcom,qcs405-iot"
compatible = "qcom,qcs403-iot"
compatible = "qcom,sa8155-adp-star"
compatible = "qcom,sa8155p-adp-star"
compatible = "qcom,adp-star"
compatible = "qcom,sdxprairie-rumi"
compatible = "qcom,sdxprairie-mtp"
compatible = "qcom,sdxprairie-cdp"
+31 −0
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@@ -19,6 +19,7 @@ Required properties for Ion heaps
  the following:
    - "SYSTEM"
    - "CARVEOUT"
    - "SECURE_CARVEOUT"
    - "DMA"
    - "HYP_CMA"
    - "SYSTEM_SECURE"
@@ -28,6 +29,7 @@ Optional properties for Ion heaps

- memory-region: phandle to memory region associated with heap.


Example:
	qcom,ion {
                 compatible = "qcom,msm-ion";
@@ -57,3 +59,32 @@ Example:
                 };

        };

"SECURE_CARVEOUT"

This heap type is expected to contain multiple child nodes. Each child node
shall contain the following required properties:

- memory-region:
Refer to Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt

- token:
A u32 containing the set of secure domains which will be able to access the
memory-region.

Example:
qcom,ion {
	compatible = "qcom,msm-ion";
	#address-cells = <1>;
	#size-cells = <0>;

	qcom,ion-heap@14 {
		reg = <14>;
		qcom,ion-heap-type = "SECURE_CARVEOUT";

		node1 {
			memory-region = <&cp_region>;
			token = <ION_FLAG_CP_TOUCH>;
		};
	};
};
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